From 3e247a3147bab980561d6c6896f8ba67244da4be Mon Sep 17 00:00:00 2001 From: uweigand Date: Fri, 1 Oct 2004 00:07:52 +0000 Subject: [PATCH] * config/s390/s390-protos.h (s390_expand_logical_operator): Add prototype. (s390_logical_operator_ok_p): Likewise. * config/s390/s390.c (s390_expand_logical_operator): New function. (s390_logical_operator_ok_p): Likewise. * config/s390/s390.md ("anddi3"): New expander. ("*anddi3"): Rename from old anddi3 pattern, add Q->Q alternative. ("*anddi3_ss", "*anddi3_ss_inv"): Remove. ("andsi3"): Use s390_expand_logical_operator. ("*andsi3_esa", "*andsi3_zarch"): Add Q->Q alternative. ("*andsi3_ss", "*andsi3_ss_inv"): Remove. ("andhi3"): New expander. ("*andhi3_zarch", "*andhi3_esa"): New patterns. ("andhi3", "*andhi3_ni", "*andhi3_ss", "*andhi3_ss_inv"): Remove. ("andqi3"): New expander. ("*andqi3_zarch", "*andqi3_esa"): New patterns. ("andqi3", "*andqi3_ni", "*andqi3_ss", "*andqi3_ss_inv"): Remove. ("iordi3"): New expander. ("*iordi3"): Rename from old iordi3 pattern, add Q->Q alternative. ("*iordi3_ss", "*iordi3_ss_inv"): Remove. ("iorsi3"): Use s390_expand_logical_operator. ("*iorsi3_esa", "*iorsi3_zarch"): Add Q->Q alternative. ("*iorsi3_ss", "*iorsi3_ss_inv"): Remove. ("iorhi3"): New expiorer. ("*iorhi3_zarch", "*iorhi3_esa"): New patterns. ("iorhi3", "*iorhi3_ni", "*iorhi3_ss", "*iorhi3_ss_inv"): Remove. ("iorqi3"): New expiorer. ("*iorqi3_zarch", "*iorqi3_esa"): New patterns. ("iorqi3", "*iorqi3_ni", "*iorqi3_ss", "*iorqi3_ss_inv"): Remove. ("xordi3"): New expander. ("*xordi3"): Rename from old xordi3 pattern, add Q->Q alternative. ("*xordi3_ss", "*xordi3_ss_inv"): Remove. ("xorsi3"): New expander. ("*xorsi3"): Rename from old xorsi3 pattern, add Q->Q alternative. ("*xorsi3_ss", "*xorsi3_ss_inv"): Remove. ("xorhi3"): New expander. ("*xorqi3"): Rename from old xorhi3 pattern, add Q->Q alternative. ("*xorhi3_ss", "*xorhi3_ss_inv"): Remove. ("xorqi3"): New expander. ("*xorqi3"): Rename from old xorqi3 pattern, add Q->Q alternative. ("*xorqi3_ss", "*xorqi3_ss_inv"): Remove. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@88370 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog | 44 ++++ gcc/config/s390/s390-protos.h | 3 + gcc/config/s390/s390.c | 70 +++++ gcc/config/s390/s390.md | 588 +++++++++++++++++------------------------- 4 files changed, 350 insertions(+), 355 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 0bc0811..59b82f9 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,47 @@ +2004-09-30 Ulrich Weigand + + * config/s390/s390-protos.h (s390_expand_logical_operator): Add + prototype. + (s390_logical_operator_ok_p): Likewise. + * config/s390/s390.c (s390_expand_logical_operator): New function. + (s390_logical_operator_ok_p): Likewise. + * config/s390/s390.md ("anddi3"): New expander. + ("*anddi3"): Rename from old anddi3 pattern, add Q->Q alternative. + ("*anddi3_ss", "*anddi3_ss_inv"): Remove. + ("andsi3"): Use s390_expand_logical_operator. + ("*andsi3_esa", "*andsi3_zarch"): Add Q->Q alternative. + ("*andsi3_ss", "*andsi3_ss_inv"): Remove. + ("andhi3"): New expander. + ("*andhi3_zarch", "*andhi3_esa"): New patterns. + ("andhi3", "*andhi3_ni", "*andhi3_ss", "*andhi3_ss_inv"): Remove. + ("andqi3"): New expander. + ("*andqi3_zarch", "*andqi3_esa"): New patterns. + ("andqi3", "*andqi3_ni", "*andqi3_ss", "*andqi3_ss_inv"): Remove. + ("iordi3"): New expander. + ("*iordi3"): Rename from old iordi3 pattern, add Q->Q alternative. + ("*iordi3_ss", "*iordi3_ss_inv"): Remove. + ("iorsi3"): Use s390_expand_logical_operator. + ("*iorsi3_esa", "*iorsi3_zarch"): Add Q->Q alternative. + ("*iorsi3_ss", "*iorsi3_ss_inv"): Remove. + ("iorhi3"): New expiorer. + ("*iorhi3_zarch", "*iorhi3_esa"): New patterns. + ("iorhi3", "*iorhi3_ni", "*iorhi3_ss", "*iorhi3_ss_inv"): Remove. + ("iorqi3"): New expiorer. + ("*iorqi3_zarch", "*iorqi3_esa"): New patterns. + ("iorqi3", "*iorqi3_ni", "*iorqi3_ss", "*iorqi3_ss_inv"): Remove. + ("xordi3"): New expander. + ("*xordi3"): Rename from old xordi3 pattern, add Q->Q alternative. + ("*xordi3_ss", "*xordi3_ss_inv"): Remove. + ("xorsi3"): New expander. + ("*xorsi3"): Rename from old xorsi3 pattern, add Q->Q alternative. + ("*xorsi3_ss", "*xorsi3_ss_inv"): Remove. + ("xorhi3"): New expander. + ("*xorqi3"): Rename from old xorhi3 pattern, add Q->Q alternative. + ("*xorhi3_ss", "*xorhi3_ss_inv"): Remove. + ("xorqi3"): New expander. + ("*xorqi3"): Rename from old xorqi3 pattern, add Q->Q alternative. + ("*xorqi3_ss", "*xorqi3_ss_inv"): Remove. + 2004-09-30 Roger Sayle * combine.c (force_to_mode) : Only convert the expression diff --git a/gcc/config/s390/s390-protos.h b/gcc/config/s390/s390-protos.h index d1407c1..8846f25 100644 --- a/gcc/config/s390/s390-protos.h +++ b/gcc/config/s390/s390-protos.h @@ -84,6 +84,9 @@ extern bool s390_expand_addcc (enum rtx_code, rtx, rtx, rtx, rtx, rtx); extern rtx s390_return_addr_rtx (int, rtx); extern rtx s390_back_chain_rtx (void); extern rtx s390_emit_call (rtx, rtx, rtx, rtx); +extern void s390_expand_logical_operator (enum rtx_code, + enum machine_mode, rtx *); +extern bool s390_logical_operator_ok_p (rtx *); extern bool s390_output_addr_const_extra (FILE*, rtx); extern void print_operand_address (FILE *, rtx); diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c index 073d9df..411b06f 100644 --- a/gcc/config/s390/s390.c +++ b/gcc/config/s390/s390.c @@ -1059,6 +1059,76 @@ s390_split_ok_p (rtx dst, rtx src, enum machine_mode mode, int first_subword) return true; } +/* Expand logical operator CODE in mode MODE with operands OPERANDS. */ + +void +s390_expand_logical_operator (enum rtx_code code, enum machine_mode mode, + rtx *operands) +{ + enum machine_mode wmode = mode; + rtx dst = operands[0]; + rtx src1 = operands[1]; + rtx src2 = operands[2]; + rtx op, clob, tem; + + /* If we cannot handle the operation directly, use a temp register. */ + if (!s390_logical_operator_ok_p (operands)) + dst = gen_reg_rtx (mode); + + /* QImode and HImode patterns make sense only if we have a destination + in memory. Otherwise perform the operation in SImode. */ + if ((mode == QImode || mode == HImode) && GET_CODE (dst) != MEM) + wmode = SImode; + + /* Widen operands if required. */ + if (mode != wmode) + { + if (GET_CODE (dst) == SUBREG + && (tem = simplify_subreg (wmode, dst, mode, 0)) != 0) + dst = tem; + else if (REG_P (dst)) + dst = gen_rtx_SUBREG (wmode, dst, 0); + else + dst = gen_reg_rtx (wmode); + + if (GET_CODE (src1) == SUBREG + && (tem = simplify_subreg (wmode, src1, mode, 0)) != 0) + src1 = tem; + else if (GET_MODE (src1) != VOIDmode) + src1 = gen_rtx_SUBREG (wmode, force_reg (mode, src1), 0); + + if (GET_CODE (src2) == SUBREG + && (tem = simplify_subreg (wmode, src2, mode, 0)) != 0) + src2 = tem; + else if (GET_MODE (src2) != VOIDmode) + src2 = gen_rtx_SUBREG (wmode, force_reg (mode, src2), 0); + } + + /* Emit the instruction. */ + op = gen_rtx_SET (VOIDmode, dst, gen_rtx_fmt_ee (code, wmode, src1, src2)); + clob = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (CCmode, CC_REGNUM)); + emit_insn (gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, op, clob))); + + /* Fix up the destination if needed. */ + if (dst != operands[0]) + emit_move_insn (operands[0], gen_lowpart (mode, dst)); +} + +/* Check whether OPERANDS are OK for a logical operation (AND, IOR, XOR). */ + +bool +s390_logical_operator_ok_p (rtx *operands) +{ + /* If the destination operand is in memory, it needs to coincide + with one of the source operands. After reload, it has to be + the first source operand. */ + if (GET_CODE (operands[0]) == MEM) + return rtx_equal_p (operands[0], operands[1]) + || (!reload_completed && rtx_equal_p (operands[0], operands[2])); + + return true; +} + /* Change optimizations to be performed, depending on the optimization level. diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md index 9f564be..86d13b8 100644 --- a/gcc/config/s390/s390.md +++ b/gcc/config/s390/s390.md @@ -5007,41 +5007,33 @@ ng\t%0,%2" [(set_attr "op_type" "RRE,RXY")]) -(define_insn "anddi3" - [(set (match_operand:DI 0 "register_operand" "=d,d,d,d,d,d,d,d") - (and:DI (match_operand:DI 1 "nonimmediate_operand" "d,o,0,0,0,0,0,0") - (match_operand:DI 2 "general_operand" - "M,M,N0HDF,N1HDF,N2HDF,N3HDF,d,m"))) - (clobber (reg:CC 33))] - "TARGET_64BIT" - "@ - # - # - nihh\t%0,%j2 - nihl\t%0,%j2 - nilh\t%0,%j2 - nill\t%0,%j2 - ngr\t%0,%2 - ng\t%0,%2" - [(set_attr "op_type" "RRE,RXE,RI,RI,RI,RI,RRE,RXY")]) - -(define_insn "*anddi3_ss" - [(set (match_operand:DI 0 "s_operand" "=Q") - (and:DI (match_dup 0) - (match_operand:DI 1 "s_imm_operand" "Q"))) +(define_insn "*anddi3" + [(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,d,d,d,d,d,d,Q") + (and:DI (match_operand:DI 1 "nonimmediate_operand" + "%d,o,0,0,0,0,0,0,0") + (match_operand:DI 2 "general_operand" + "M,M,N0HDF,N1HDF,N2HDF,N3HDF,d,m,Q"))) (clobber (reg:CC 33))] - "" - "nc\t%O0(8,%R0),%1" - [(set_attr "op_type" "SS")]) + "TARGET_64BIT && s390_logical_operator_ok_p (operands)" + "@ + # + # + nihh\t%0,%j2 + nihl\t%0,%j2 + nilh\t%0,%j2 + nill\t%0,%j2 + ngr\t%0,%2 + ng\t%0,%2 + nc\t%O0(8,%R0),%2" + [(set_attr "op_type" "RRE,RXE,RI,RI,RI,RI,RRE,RXY,SS")]) -(define_insn "*anddi3_ss_inv" - [(set (match_operand:DI 0 "s_operand" "=Q") - (and:DI (match_operand:DI 1 "s_imm_operand" "Q") - (match_dup 0))) +(define_expand "anddi3" + [(set (match_operand:DI 0 "nonimmediate_operand" "") + (and:DI (match_operand:DI 1 "nonimmediate_operand" "") + (match_operand:DI 2 "general_operand" ""))) (clobber (reg:CC 33))] - "" - "nc\t%O0(8,%R0),%1" - [(set_attr "op_type" "SS")]) + "TARGET_64BIT" + "s390_expand_logical_operator (AND, DImode, operands); DONE;") ; ; andsi3 instruction pattern(s). @@ -5076,21 +5068,12 @@ ny\t%0,%2" [(set_attr "op_type" "RR,RX,RXY")]) -(define_expand "andsi3" - [(parallel - [(set (match_operand:SI 0 "register_operand" "") - (and:SI (match_operand:SI 1 "nonimmediate_operand" "") - (match_operand:SI 2 "general_operand" ""))) - (clobber (reg:CC 33))])] - "" - "") - (define_insn "*andsi3_zarch" - [(set (match_operand:SI 0 "register_operand" "=d,d,d,d,d,d,d") - (and:SI (match_operand:SI 1 "nonimmediate_operand" "d,o,0,0,0,0,0") - (match_operand:SI 2 "general_operand" "M,M,N0HSF,N1HSF,d,R,T"))) + [(set (match_operand:SI 0 "nonimmediate_operand" "=d,d,d,d,d,d,d,Q") + (and:SI (match_operand:SI 1 "nonimmediate_operand" "%d,o,0,0,0,0,0,0") + (match_operand:SI 2 "general_operand" "M,M,N0HSF,N1HSF,d,R,T,Q"))) (clobber (reg:CC 33))] - "TARGET_ZARCH" + "TARGET_ZARCH && s390_logical_operator_ok_p (operands)" "@ # # @@ -5098,127 +5081,102 @@ nill\t%0,%j2 nr\t%0,%2 n\t%0,%2 - ny\t%0,%2" - [(set_attr "op_type" "RRE,RXE,RI,RI,RR,RX,RXY")]) + ny\t%0,%2 + nc\t%O0(4,%R0),%2" + [(set_attr "op_type" "RRE,RXE,RI,RI,RR,RX,RXY,SS")]) (define_insn "*andsi3_esa" - [(set (match_operand:SI 0 "register_operand" "=d,d") - (and:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0") - (match_operand:SI 2 "general_operand" "d,R"))) + [(set (match_operand:SI 0 "nonimmediate_operand" "=d,d,Q") + (and:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,0") + (match_operand:SI 2 "general_operand" "d,R,Q"))) (clobber (reg:CC 33))] - "!TARGET_ZARCH" + "!TARGET_ZARCH && s390_logical_operator_ok_p (operands)" "@ nr\t%0,%2 - n\t%0,%2" - [(set_attr "op_type" "RR,RX")]) - -(define_insn "*andsi3_ss" - [(set (match_operand:SI 0 "s_operand" "=Q") - (and:SI (match_dup 0) - (match_operand:SI 1 "s_imm_operand" "Q"))) - (clobber (reg:CC 33))] - "" - "nc\t%O0(4,%R0),%1" - [(set_attr "op_type" "SS")]) + n\t%0,%2 + nc\t%O0(4,%R0),%2" + [(set_attr "op_type" "RR,RX,SS")]) -(define_insn "*andsi3_ss_inv" - [(set (match_operand:SI 0 "s_operand" "=Q") - (and:SI (match_operand:SI 1 "s_imm_operand" "Q") - (match_dup 0))) +(define_expand "andsi3" + [(set (match_operand:SI 0 "nonimmediate_operand" "") + (and:SI (match_operand:SI 1 "nonimmediate_operand" "") + (match_operand:SI 2 "general_operand" ""))) (clobber (reg:CC 33))] "" - "nc\t%O0(4,%R0),%1" - [(set_attr "op_type" "SS")]) + "s390_expand_logical_operator (AND, SImode, operands); DONE;") ; ; andhi3 instruction pattern(s). ; -(define_insn "*andhi3_ni" - [(set (match_operand:HI 0 "register_operand" "=d,d") - (and:HI (match_operand:HI 1 "register_operand" "%0,0") - (match_operand:HI 2 "nonmemory_operand" "d,n"))) +(define_insn "*andhi3_zarch" + [(set (match_operand:HI 0 "nonimmediate_operand" "=d,d,Q") + (and:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0,0") + (match_operand:HI 2 "general_operand" "d,n,Q"))) (clobber (reg:CC 33))] - "TARGET_ZARCH" + "TARGET_ZARCH && s390_logical_operator_ok_p (operands)" "@ nr\t%0,%2 - nill\t%0,%x2" - [(set_attr "op_type" "RR,RI")]) - -(define_insn "andhi3" - [(set (match_operand:HI 0 "register_operand" "=d") - (and:HI (match_operand:HI 1 "register_operand" "%0") - (match_operand:HI 2 "nonmemory_operand" "d"))) + nill\t%0,%x2 + nc\t%O0(2,%R0),%2" + [(set_attr "op_type" "RR,RI,SS")]) + +(define_insn "*andhi3_esa" + [(set (match_operand:HI 0 "nonimmediate_operand" "=d,Q") + (and:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0") + (match_operand:HI 2 "general_operand" "d,Q"))) (clobber (reg:CC 33))] - "" - "nr\t%0,%2" - [(set_attr "op_type" "RR")]) - -(define_insn "*andhi3_ss" - [(set (match_operand:HI 0 "s_operand" "=Q") - (and:HI (match_dup 0) - (match_operand:HI 1 "s_imm_operand" "Q"))) - (clobber (reg:CC 33))] - "" - "nc\t%O0(2,%R0),%1" - [(set_attr "op_type" "SS")]) + "!TARGET_ZARCH && s390_logical_operator_ok_p (operands)" + "@ + nr\t%0,%2 + nc\t%O0(2,%R0),%2" + [(set_attr "op_type" "RR,SS")]) -(define_insn "*andhi3_ss_inv" - [(set (match_operand:HI 0 "s_operand" "=Q") - (and:HI (match_operand:HI 1 "s_imm_operand" "Q") - (match_dup 0))) +(define_expand "andhi3" + [(set (match_operand:HI 0 "nonimmediate_operand" "") + (and:HI (match_operand:HI 1 "nonimmediate_operand" "") + (match_operand:HI 2 "general_operand" ""))) (clobber (reg:CC 33))] "" - "nc\t%O0(2,%R0),%1" - [(set_attr "op_type" "SS")]) + "s390_expand_logical_operator (AND, HImode, operands); DONE;") ; ; andqi3 instruction pattern(s). ; -(define_insn "*andqi3_ni" - [(set (match_operand:QI 0 "register_operand" "=d,d") - (and:QI (match_operand:QI 1 "register_operand" "%0,0") - (match_operand:QI 2 "nonmemory_operand" "d,n"))) +(define_insn "*andqi3_zarch" + [(set (match_operand:QI 0 "nonimmediate_operand" "=d,d,Q,S,Q") + (and:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,0,0,0") + (match_operand:QI 2 "general_operand" "d,n,n,n,Q"))) (clobber (reg:CC 33))] - "TARGET_ZARCH" + "TARGET_ZARCH && s390_logical_operator_ok_p (operands)" "@ nr\t%0,%2 - nill\t%0,%b2" - [(set_attr "op_type" "RR,RI")]) - -(define_insn "andqi3" - [(set (match_operand:QI 0 "register_operand" "=d") - (and:QI (match_operand:QI 1 "register_operand" "%0") - (match_operand:QI 2 "nonmemory_operand" "d"))) + nill\t%0,%b2 + ni\t%0,%b2 + niy\t%0,%b2 + nc\t%O0(1,%R0),%2" + [(set_attr "op_type" "RR,RI,SI,SIY,SS")]) + +(define_insn "*andqi3_esa" + [(set (match_operand:QI 0 "nonimmediate_operand" "=d,Q,Q") + (and:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,0") + (match_operand:QI 2 "general_operand" "d,n,Q"))) (clobber (reg:CC 33))] - "" - "nr\t%0,%2" - [(set_attr "op_type" "RR")]) - -(define_insn "*andqi3_ss" - [(set (match_operand:QI 0 "s_operand" "=Q,S,Q") - (and:QI (match_dup 0) - (match_operand:QI 1 "s_imm_operand" "n,n,Q"))) - (clobber (reg:CC 33))] - "" + "!TARGET_ZARCH && s390_logical_operator_ok_p (operands)" "@ - ni\t%0,%b1 - niy\t%0,%b1 - nc\t%O0(1,%R0),%1" - [(set_attr "op_type" "SI,SIY,SS")]) + nr\t%0,%2 + ni\t%0,%b2 + nc\t%O0(1,%R0),%2" + [(set_attr "op_type" "RR,SI,SS")]) -(define_insn "*andqi3_ss_inv" - [(set (match_operand:QI 0 "s_operand" "=Q,S,Q") - (and:QI (match_operand:QI 1 "s_imm_operand" "n,n,Q") - (match_dup 0))) +(define_expand "andqi3" + [(set (match_operand:QI 0 "nonimmediate_operand" "") + (and:QI (match_operand:QI 1 "nonimmediate_operand" "") + (match_operand:QI 2 "general_operand" ""))) (clobber (reg:CC 33))] "" - "@ - ni\t%0,%b1 - niy\t%0,%b1 - nc\t%O0(1,%R0),%1" - [(set_attr "op_type" "SI,SIY,SS")]) + "s390_expand_logical_operator (AND, QImode, operands); DONE;") ;; @@ -5254,38 +5212,30 @@ og\t%0,%2" [(set_attr "op_type" "RRE,RXY")]) -(define_insn "iordi3" - [(set (match_operand:DI 0 "register_operand" "=d,d,d,d,d,d") - (ior:DI (match_operand:DI 1 "nonimmediate_operand" "0,0,0,0,0,0") - (match_operand:DI 2 "general_operand" "N0HD0,N1HD0,N2HD0,N3HD0,d,m"))) +(define_insn "*iordi3" + [(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,d,d,d,d,Q") + (ior:DI (match_operand:DI 1 "nonimmediate_operand" "0,0,0,0,0,0,0") + (match_operand:DI 2 "general_operand" + "N0HD0,N1HD0,N2HD0,N3HD0,d,m,Q"))) (clobber (reg:CC 33))] - "TARGET_64BIT" + "TARGET_64BIT && s390_logical_operator_ok_p (operands)" "@ oihh\t%0,%i2 oihl\t%0,%i2 oilh\t%0,%i2 oill\t%0,%i2 ogr\t%0,%2 - og\t%0,%2" - [(set_attr "op_type" "RI,RI,RI,RI,RRE,RXY")]) - -(define_insn "*iordi3_ss" - [(set (match_operand:DI 0 "s_operand" "=Q") - (ior:DI (match_dup 0) - (match_operand:DI 1 "s_imm_operand" "Q"))) - (clobber (reg:CC 33))] - "" - "oc\t%O0(8,%R0),%1" - [(set_attr "op_type" "SS")]) + og\t%0,%2 + oc\t%O0(8,%R0),%2" + [(set_attr "op_type" "RI,RI,RI,RI,RRE,RXY,SS")]) -(define_insn "*iordi3_ss_inv" - [(set (match_operand:DI 0 "s_operand" "=Q") - (ior:DI (match_operand:DI 1 "s_imm_operand" "Q") - (match_dup 0))) +(define_expand "iordi3" + [(set (match_operand:DI 0 "nonimmediate_operand" "") + (ior:DI (match_operand:DI 1 "nonimmediate_operand" "") + (match_operand:DI 2 "general_operand" ""))) (clobber (reg:CC 33))] - "" - "oc\t%O0(8,%R0),%1" - [(set_attr "op_type" "SS")]) + "TARGET_64BIT" + "s390_expand_logical_operator (IOR, DImode, operands); DONE;") ; ; iorsi3 instruction pattern(s). @@ -5318,147 +5268,113 @@ oy\t%0,%2" [(set_attr "op_type" "RR,RX,RXY")]) -(define_expand "iorsi3" - [(parallel - [(set (match_operand:SI 0 "register_operand" "") - (ior:SI (match_operand:SI 1 "nonimmediate_operand" "") - (match_operand:SI 2 "general_operand" ""))) - (clobber (reg:CC 33))])] - "" - "") - -(define_insn "iorsi3_zarch" - [(set (match_operand:SI 0 "register_operand" "=d,d,d,d,d") - (ior:SI (match_operand:SI 1 "nonimmediate_operand" "0,0,0,0,0") - (match_operand:SI 2 "general_operand" "N0HS0,N1HS0,d,R,T"))) +(define_insn "*iorsi3_zarch" + [(set (match_operand:SI 0 "nonimmediate_operand" "=d,d,d,d,d,Q") + (ior:SI (match_operand:SI 1 "nonimmediate_operand" "0,0,0,0,0,0") + (match_operand:SI 2 "general_operand" "N0HS0,N1HS0,d,R,T,Q"))) (clobber (reg:CC 33))] - "TARGET_ZARCH" + "TARGET_ZARCH && s390_logical_operator_ok_p (operands)" "@ oilh\t%0,%i2 oill\t%0,%i2 or\t%0,%2 o\t%0,%2 - oy\t%0,%2" - [(set_attr "op_type" "RI,RI,RR,RX,RXY")]) - -(define_insn "iorsi3_esa" - [(set (match_operand:SI 0 "register_operand" "=d,d") - (ior:SI (match_operand:SI 1 "nonimmediate_operand" "0,0") - (match_operand:SI 2 "general_operand" "d,R"))) + oy\t%0,%2 + oc\t%O0(4,%R0),%2" + [(set_attr "op_type" "RI,RI,RR,RX,RXY,SS")]) + +(define_insn "*iorsi3_esa" + [(set (match_operand:SI 0 "nonimmediate_operand" "=d,d,Q") + (ior:SI (match_operand:SI 1 "nonimmediate_operand" "0,0,0") + (match_operand:SI 2 "general_operand" "d,R,Q"))) (clobber (reg:CC 33))] - "!TARGET_ZARCH" + "!TARGET_ZARCH && s390_logical_operator_ok_p (operands)" "@ or\t%0,%2 - o\t%0,%2" - [(set_attr "op_type" "RR,RX")]) - -(define_insn "*iorsi3_ss" - [(set (match_operand:SI 0 "s_operand" "=Q") - (ior:SI (match_dup 0) - (match_operand:SI 1 "s_imm_operand" "Q"))) - (clobber (reg:CC 33))] - "" - "oc\t%O0(4,%R0),%1" - [(set_attr "op_type" "SS")]) + o\t%0,%2 + oc\t%O0(4,%R0),%2" + [(set_attr "op_type" "RR,RX,SS")]) -(define_insn "*iorsi3_ss_inv" - [(set (match_operand:SI 0 "s_operand" "=Q") - (ior:SI (match_operand:SI 1 "s_imm_operand" "Q") - (match_dup 0))) +(define_expand "iorsi3" + [(set (match_operand:SI 0 "nonimmediate_operand" "") + (ior:SI (match_operand:SI 1 "nonimmediate_operand" "") + (match_operand:SI 2 "general_operand" ""))) (clobber (reg:CC 33))] "" - "oc\t%O0(4,%R0),%1" - [(set_attr "op_type" "SS")]) + "s390_expand_logical_operator (IOR, SImode, operands); DONE;") ; ; iorhi3 instruction pattern(s). ; -(define_insn "*iorhi3_oi" - [(set (match_operand:HI 0 "register_operand" "=d,d") - (ior:HI (match_operand:HI 1 "register_operand" "%0,0") - (match_operand:HI 2 "nonmemory_operand" "d,n"))) +(define_insn "*iorhi3_zarch" + [(set (match_operand:HI 0 "nonimmediate_operand" "=d,d,Q") + (ior:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0,0") + (match_operand:HI 2 "general_operand" "d,n,Q"))) (clobber (reg:CC 33))] - "TARGET_ZARCH" + "TARGET_ZARCH && s390_logical_operator_ok_p (operands)" "@ or\t%0,%2 - oill\t%0,%x2" - [(set_attr "op_type" "RR,RI")]) - -(define_insn "iorhi3" - [(set (match_operand:HI 0 "register_operand" "=d") - (ior:HI (match_operand:HI 1 "register_operand" "%0") - (match_operand:HI 2 "nonmemory_operand" "d"))) - (clobber (reg:CC 33))] - "" - "or\t%0,%2" - [(set_attr "op_type" "RR")]) - -(define_insn "*iorhi3_ss" - [(set (match_operand:HI 0 "s_operand" "=Q") - (ior:HI (match_dup 0) - (match_operand:HI 1 "s_imm_operand" "Q"))) + oill\t%0,%x2 + oc\t%O0(2,%R0),%2" + [(set_attr "op_type" "RR,RI,SS")]) + +(define_insn "*iorhi3_esa" + [(set (match_operand:HI 0 "nonimmediate_operand" "=d,Q") + (ior:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0") + (match_operand:HI 2 "general_operand" "d,Q"))) (clobber (reg:CC 33))] - "" - "oc\t%O0(2,%R0),%1" - [(set_attr "op_type" "SS")]) + "!TARGET_ZARCH && s390_logical_operator_ok_p (operands)" + "@ + or\t%0,%2 + oc\t%O0(2,%R0),%2" + [(set_attr "op_type" "RR,SS")]) -(define_insn "*iorhi3_ss_inv" - [(set (match_operand:HI 0 "s_operand" "=Q") - (ior:HI (match_operand:HI 1 "s_imm_operand" "Q") - (match_dup 0))) +(define_expand "iorhi3" + [(set (match_operand:HI 0 "nonimmediate_operand" "") + (ior:HI (match_operand:HI 1 "nonimmediate_operand" "") + (match_operand:HI 2 "general_operand" ""))) (clobber (reg:CC 33))] "" - "oc\t%O0(2,%R0),%1" - [(set_attr "op_type" "SS")]) + "s390_expand_logical_operator (IOR, HImode, operands); DONE;") ; ; iorqi3 instruction pattern(s). ; -(define_insn "*iorqi3_oi" - [(set (match_operand:QI 0 "register_operand" "=d,d") - (ior:QI (match_operand:QI 1 "register_operand" "%0,0") - (match_operand:QI 2 "nonmemory_operand" "d,n"))) +(define_insn "*iorqi3_zarch" + [(set (match_operand:QI 0 "nonimmediate_operand" "=d,d,Q,S,Q") + (ior:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,0,0,0") + (match_operand:QI 2 "general_operand" "d,n,n,n,Q"))) (clobber (reg:CC 33))] - "TARGET_ZARCH" + "TARGET_ZARCH && s390_logical_operator_ok_p (operands)" "@ or\t%0,%2 - oill\t%0,%b2" - [(set_attr "op_type" "RR,RI")]) - -(define_insn "iorqi3" - [(set (match_operand:QI 0 "register_operand" "=d") - (ior:QI (match_operand:QI 1 "register_operand" "%0") - (match_operand:QI 2 "nonmemory_operand" "d"))) - (clobber (reg:CC 33))] - "" - "or\t%0,%2" - [(set_attr "op_type" "RR")]) - -(define_insn "*iorqi3_ss" - [(set (match_operand:QI 0 "s_operand" "=Q,S,Q") - (ior:QI (match_dup 0) - (match_operand:QI 1 "s_imm_operand" "n,n,Q"))) + oill\t%0,%b2 + oi\t%0,%b2 + oiy\t%0,%b2 + oc\t%O0(1,%R0),%2" + [(set_attr "op_type" "RR,RI,SI,SIY,SS")]) + +(define_insn "*iorqi3_esa" + [(set (match_operand:QI 0 "nonimmediate_operand" "=d,Q,Q") + (ior:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,0") + (match_operand:QI 2 "general_operand" "d,n,Q"))) (clobber (reg:CC 33))] - "" + "!TARGET_ZARCH && s390_logical_operator_ok_p (operands)" "@ - oi\t%0,%b1 - oiy\t%0,%b1 - oc\t%O0(1,%R0),%1" - [(set_attr "op_type" "SI,SIY,SS")]) + or\t%0,%2 + oi\t%0,%b2 + oc\t%O0(1,%R0),%2" + [(set_attr "op_type" "RR,SI,SS")]) -(define_insn "*iorqi3_ss_inv" - [(set (match_operand:QI 0 "s_operand" "=Q,S,Q") - (ior:QI (match_operand:QI 1 "s_imm_operand" "n,n,Q") - (match_dup 0))) +(define_expand "iorqi3" + [(set (match_operand:QI 0 "nonimmediate_operand" "") + (ior:QI (match_operand:QI 1 "nonimmediate_operand" "") + (match_operand:QI 2 "general_operand" ""))) (clobber (reg:CC 33))] "" - "@ - oi\t%0,%b1 - oiy\t%0,%b1 - oc\t%O0(1,%R0),%1" - [(set_attr "op_type" "SI,SIY,SS")]) + "s390_expand_logical_operator (IOR, QImode, operands); DONE;") ;; @@ -5494,34 +5410,25 @@ xr\t%0,%2" [(set_attr "op_type" "RRE,RXY")]) -(define_insn "xordi3" - [(set (match_operand:DI 0 "register_operand" "=d,d") - (xor:DI (match_operand:DI 1 "nonimmediate_operand" "%0,0") - (match_operand:DI 2 "general_operand" "d,m"))) +(define_insn "*xordi3" + [(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,Q") + (xor:DI (match_operand:DI 1 "nonimmediate_operand" "%0,0,0") + (match_operand:DI 2 "general_operand" "d,m,Q"))) (clobber (reg:CC 33))] - "TARGET_64BIT" + "TARGET_64BIT && s390_logical_operator_ok_p (operands)" "@ xgr\t%0,%2 - xg\t%0,%2" - [(set_attr "op_type" "RRE,RXY")]) - -(define_insn "*xordi3_ss" - [(set (match_operand:DI 0 "s_operand" "=Q") - (xor:DI (match_dup 0) - (match_operand:DI 1 "s_imm_operand" "Q"))) - (clobber (reg:CC 33))] - "" - "xc\t%O0(8,%R0),%1" - [(set_attr "op_type" "SS")]) + xg\t%0,%2 + xc\t%O0(8,%R0),%2" + [(set_attr "op_type" "RRE,RXY,SS")]) -(define_insn "*xordi3_ss_inv" - [(set (match_operand:DI 0 "s_operand" "=Q") - (xor:DI (match_operand:DI 1 "s_imm_operand" "Q") - (match_dup 0))) +(define_expand "xordi3" + [(set (match_operand:DI 0 "nonimmediate_operand" "") + (xor:DI (match_operand:DI 1 "nonimmediate_operand" "") + (match_operand:DI 2 "general_operand" ""))) (clobber (reg:CC 33))] - "" - "xc\t%O0(8,%R0),%1" - [(set_attr "op_type" "SS")]) + "TARGET_64BIT" + "s390_expand_logical_operator (XOR, DImode, operands); DONE;") ; ; xorsi3 instruction pattern(s). @@ -5554,103 +5461,74 @@ xy\t%0,%2" [(set_attr "op_type" "RR,RX,RXY")]) -(define_insn "xorsi3" - [(set (match_operand:SI 0 "register_operand" "=d,d,d") - (xor:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,0") - (match_operand:SI 2 "general_operand" "d,R,T"))) +(define_insn "*xorsi3" + [(set (match_operand:SI 0 "nonimmediate_operand" "=d,d,d,Q") + (xor:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,0,0") + (match_operand:SI 2 "general_operand" "d,R,T,Q"))) (clobber (reg:CC 33))] - "" + "s390_logical_operator_ok_p (operands)" "@ xr\t%0,%2 x\t%0,%2 - xy\t%0,%2" - [(set_attr "op_type" "RR,RX,RXY")]) - -(define_insn "*xorsi3_ss" - [(set (match_operand:SI 0 "s_operand" "=Q") - (xor:SI (match_dup 0) - (match_operand:SI 1 "s_imm_operand" "Q"))) + xy\t%0,%2 + xc\t%O0(4,%R0),%2" + [(set_attr "op_type" "RR,RX,RXY,SS")]) + +(define_expand "xorsi3" + [(set (match_operand:SI 0 "nonimmediate_operand" "") + (xor:SI (match_operand:SI 1 "nonimmediate_operand" "") + (match_operand:SI 2 "general_operand" ""))) (clobber (reg:CC 33))] "" - "xc\t%O0(4,%R0),%1" - [(set_attr "op_type" "SS")]) - -(define_insn "*xorsi3_ss_inv" - [(set (match_operand:SI 0 "s_operand" "=Q") - (xor:SI (match_operand:SI 1 "s_imm_operand" "Q") - (match_dup 0))) - (clobber (reg:CC 33))] - "" - "xc\t%O0(4,%R0),%1" - [(set_attr "op_type" "SS")]) + "s390_expand_logical_operator (XOR, SImode, operands); DONE;") ; ; xorhi3 instruction pattern(s). ; -(define_insn "xorhi3" - [(set (match_operand:HI 0 "register_operand" "=d") - (xor:HI (match_operand:HI 1 "register_operand" "%0") - (match_operand:HI 2 "nonmemory_operand" "d"))) - (clobber (reg:CC 33))] - "" - "xr\t%0,%2" - [(set_attr "op_type" "RR")]) - -(define_insn "*xorhi3_ss" - [(set (match_operand:HI 0 "s_operand" "=Q") - (xor:HI (match_dup 0) - (match_operand:HI 1 "s_imm_operand" "Q"))) +(define_insn "*xorhi3" + [(set (match_operand:HI 0 "nonimmediate_operand" "=d,Q") + (xor:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0") + (match_operand:HI 2 "general_operand" "d,Q"))) (clobber (reg:CC 33))] - "" - "xc\t%O0(2,%R0),%1" - [(set_attr "op_type" "SS")]) + "s390_logical_operator_ok_p (operands)" + "@ + xr\t%0,%2 + xc\t%O0(2,%R0),%2" + [(set_attr "op_type" "RR,SS")]) -(define_insn "*xorhi3_ss_inv" - [(set (match_operand:HI 0 "s_operand" "=Q") - (xor:HI (match_operand:HI 1 "s_imm_operand" "Q") - (match_dup 0))) +(define_expand "xorhi3" + [(set (match_operand:HI 0 "nonimmediate_operand" "") + (xor:HI (match_operand:HI 1 "nonimmediate_operand" "") + (match_operand:HI 2 "general_operand" ""))) (clobber (reg:CC 33))] "" - "xc\t%O0(2,%R0),%1" - [(set_attr "op_type" "SS")]) + "s390_expand_logical_operator (XOR, HImode, operands); DONE;") ; ; xorqi3 instruction pattern(s). ; -(define_insn "xorqi3" - [(set (match_operand:QI 0 "register_operand" "=d") - (xor:QI (match_operand:QI 1 "register_operand" "%0") - (match_operand:QI 2 "nonmemory_operand" "d"))) +(define_insn "*xorqi3" + [(set (match_operand:QI 0 "nonimmediate_operand" "=d,Q,S,Q") + (xor:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,0,0") + (match_operand:QI 2 "general_operand" "d,n,n,Q"))) (clobber (reg:CC 33))] - "" - "xr\t%0,%2" - [(set_attr "op_type" "RR")]) - -(define_insn "*xorqi3_ss" - [(set (match_operand:QI 0 "s_operand" "=Q,S,Q") - (xor:QI (match_dup 0) - (match_operand:QI 1 "s_imm_operand" "n,n,Q"))) - (clobber (reg:CC 33))] - "" + "s390_logical_operator_ok_p (operands)" "@ - xi\t%0,%b1 - xiy\t%0,%b1 - xc\t%O0(1,%R0),%1" - [(set_attr "op_type" "SI,SIY,SS")]) + xr\t%0,%2 + xi\t%0,%b2 + xiy\t%0,%b2 + xc\t%O0(1,%R0),%2" + [(set_attr "op_type" "RR,SI,SIY,SS")]) -(define_insn "*xorqi3_ss_inv" - [(set (match_operand:QI 0 "s_operand" "=Q,S,Q") - (xor:QI (match_operand:QI 1 "s_imm_operand" "n,n,Q") - (match_dup 0))) +(define_expand "xorqi3" + [(set (match_operand:QI 0 "nonimmediate_operand" "") + (xor:QI (match_operand:QI 1 "nonimmediate_operand" "") + (match_operand:QI 2 "general_operand" ""))) (clobber (reg:CC 33))] "" - "@ - xi\t%0,%b1 - xiy\t%0,%b1 - xc\t%O0(1,%R0),%1" - [(set_attr "op_type" "SI,SIY,SS")]) + "s390_expand_logical_operator (XOR, QImode, operands); DONE;") ;; -- 2.7.4