From 3e12cc9463e6c75212c513e3667be0e334e765ac Mon Sep 17 00:00:00 2001 From: Stanislav Mekhanoshin Date: Thu, 16 Mar 2023 16:14:02 -0700 Subject: [PATCH] [AMDGPU] Simplify AGPR reservation. NFC. The intent of the code was to reserve all AGPRs on a target without AGPRs, so just do exactly that. Existing code was unsound. --- llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp b/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp index f7ce581..3bb93b7 100644 --- a/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp +++ b/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp @@ -654,8 +654,7 @@ BitVector SIRegisterInfo::getReservedRegs(const MachineFunction &MF) const { // Reserve all the AGPRs if there are no instructions to use it. if (!ST.hasMAIInsts()) { - for (unsigned i = 0; i < MaxNumAGPRs; ++i) { - unsigned Reg = AMDGPU::AGPR_32RegClass.getRegister(i); + for (MCRegister Reg : AMDGPU::AGPR_32RegClass) { reserveRegisterTuples(Reserved, Reg); } } -- 2.7.4