From 3e0ce4af4f6d310a762ca850694ae16a298b5f75 Mon Sep 17 00:00:00 2001
From: =?utf8?q?Marek=20Ol=C5=A1=C3=A1k?= <marek.olsak@amd.com>
Date: Sun, 28 Mar 2021 00:42:13 -0400
Subject: [PATCH] amd/registers: clean up gfx103.json

because gfx103.json is automatically generated and can't be changed
manually. This fixes the file generator without changing the generated
header.

Missing registers must be in registers-manually-defined.json, and
missing fields must be in parse_kernel_headers.py.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10261>
---
 src/amd/registers/gfx103.json                     | 12 ------------
 src/amd/registers/parse_kernel_headers.py         |  2 ++
 src/amd/registers/registers-manually-defined.json | 12 ++++++++++++
 3 files changed, 14 insertions(+), 12 deletions(-)

diff --git a/src/amd/registers/gfx103.json b/src/amd/registers/gfx103.json
index 77acb49..3587d34 100644
--- a/src/amd/registers/gfx103.json
+++ b/src/amd/registers/gfx103.json
@@ -8220,12 +8220,6 @@
   },
   {
    "chips": ["gfx103"],
-   "map": {"at": 199052, "to": "mm"},
-   "name": "GE_VRS_RATE",
-   "type_ref": "GE_VRS_RATE"
-  },
-  {
-   "chips": ["gfx103"],
    "map": {"at": 199168, "to": "mm"},
    "name": "PA_SU_LINE_STIPPLE_VALUE",
    "type_ref": "PA_SU_LINE_STIPPLE_VALUE"
@@ -14490,12 +14484,6 @@
     {"bits": [2, 2], "name": "EN_USER_VGPR3"}
    ]
   },
-  "GE_VRS_RATE": {
-   "fields": [
-    {"bits": [0, 1], "name": "RATE_X"},
-    {"bits": [4, 5], "name": "RATE_Y"}
-   ]
-  },
   "GRBM_GFX_INDEX": {
    "fields": [
     {"bits": [0, 7], "name": "INSTANCE_INDEX"},
diff --git a/src/amd/registers/parse_kernel_headers.py b/src/amd/registers/parse_kernel_headers.py
index b50dcef..ed86ceb 100644
--- a/src/amd/registers/parse_kernel_headers.py
+++ b/src/amd/registers/parse_kernel_headers.py
@@ -629,6 +629,8 @@ fields_missing = {
   },
   'gfx103': {
     "DB_RESERVED_REG_2": [["RESOURCE_LEVEL", 28, 31, None, True]],
+    "VGT_DRAW_PAYLOAD_CNTL": [["EN_VRS_RATE", 6, 6]],
+    "VGT_SHADER_STAGES_EN": [["PRIMGEN_PASSTHRU_NO_MSG", 26, 26]],
   },
 }
 
diff --git a/src/amd/registers/registers-manually-defined.json b/src/amd/registers/registers-manually-defined.json
index d285bf1..8ea46f8 100644
--- a/src/amd/registers/registers-manually-defined.json
+++ b/src/amd/registers/registers-manually-defined.json
@@ -37,6 +37,12 @@
    "map": {"at": 3668, "to": "mm"},
    "name": "SRBM_STATUS3",
    "type_ref": "SRBM_STATUS3"
+  },
+  {
+   "chips": ["gfx103"],
+   "map": {"at": 199052, "to": "mm"},
+   "name": "GE_VRS_RATE",
+   "type_ref": "GE_VRS_RATE"
   }
  ],
  "register_types": {
@@ -146,6 +152,12 @@
     {"bits": [14, 14], "name": "MCD6_BUSY"},
     {"bits": [15, 15], "name": "MCD7_BUSY"}
    ]
+  },
+  "GE_VRS_RATE": {
+   "fields": [
+    {"bits": [0, 1], "name": "RATE_X"},
+    {"bits": [4, 5], "name": "RATE_Y"}
+   ]
   }
  }
 }
\ No newline at end of file
-- 
2.7.4