From 3c8fcc78dfb259d1767c667306b5333e584c2a3d Mon Sep 17 00:00:00 2001
From: Hanjie Lin <hanjie.lin@amlogic.com>
Date: Thu, 22 Nov 2018 14:47:49 +0800
Subject: [PATCH] dts: add txl support of arm pmu [1/1]

PD#SWPL-2096

Problem:
32bit_kernel CtsSimpleperfTestCases modules 39 fail

Solution:
txl dts is not ready
modify dts

Verify:
p321

Change-Id: Ib922ec4f4a1c421d76e1f397b321d4050fda2c84
Signed-off-by: Hanjie Lin <hanjie.lin@amlogic.com>
---
 arch/arm/boot/dts/amlogic/mesontxl.dtsi   | 15 ++++++++++-----
 arch/arm64/boot/dts/amlogic/mesontxl.dtsi | 15 ++++++++++-----
 2 files changed, 20 insertions(+), 10 deletions(-)

diff --git a/arch/arm/boot/dts/amlogic/mesontxl.dtsi b/arch/arm/boot/dts/amlogic/mesontxl.dtsi
index 1fb4036..9eb8787 100644
--- a/arch/arm/boot/dts/amlogic/mesontxl.dtsi
+++ b/arch/arm/boot/dts/amlogic/mesontxl.dtsi
@@ -140,11 +140,16 @@
 	};
 
 	pmu {
-		compatible = "arm,armv8-pmuv3";
-		interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
+		compatible = "arm,cortex-a15-pmu";
+		interrupts = <0 137 4>;
+		reg = <0xc8834400 0x1000>;
+		/* addr = base + offset << 2 */
+		sys_cpu_status0_offset = <0xa0>;
+		sys_cpu_status0_pmuirq_mask = <0xf>;
+		/* default 10ms */
+		relax_timer_ns = <10000000>;
+		/* default 10000us */
+		max_wait_cnt = <10000>;
 	};
 
 	psci {
diff --git a/arch/arm64/boot/dts/amlogic/mesontxl.dtsi b/arch/arm64/boot/dts/amlogic/mesontxl.dtsi
index fcce1f7..f059ae3 100644
--- a/arch/arm64/boot/dts/amlogic/mesontxl.dtsi
+++ b/arch/arm64/boot/dts/amlogic/mesontxl.dtsi
@@ -139,12 +139,17 @@
 		bit_resolution = <0>;
 	};
 
-	pmu {
+	arm_pmu {
 		compatible = "arm,armv8-pmuv3";
-		interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
+		interrupts = <0 137 4>;
+		reg = <0x0 0xc8834400 0 0x1000>;
+		/* addr = base + offset << 2 */
+		sys_cpu_status0_offset = <0xa0>;
+		sys_cpu_status0_pmuirq_mask = <0xf>;
+		/* default 10ms */
+		relax_timer_ns = <10000000>;
+		/* default 10000us */
+		max_wait_cnt = <10000>;
 	};
 
 	psci {
-- 
2.7.4