From 3c6ea7e28c957bdaf03df8a3a4ff00c46e9315f6 Mon Sep 17 00:00:00 2001 From: Roman Tereshin Date: Mon, 23 Apr 2018 22:28:36 +0000 Subject: [PATCH] [GlobalISel][Legalizer] Look thro copies while combining G_UNMERGE's As we're becoming stricter w/ respect to not allowing vregs having LLTs and regclasses assigned both mid-globalisel pipeline, the number of extra copies grows, some of which separate G_UNMERGE's from their corresponding G_MERGE's, becoming a performance concern. It's worth mentioning that we're already looking through copies while combining legalization artifacts for every kind of artifact but G_UNMERGE. Reviewed By: aditya_nandakumar Reviewers: ab, t.p.northover, volkan, javed.absar Subscribers: rovka, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D45644 llvm-svn: 330660 --- .../GlobalISel/LegalizationArtifactCombiner.h | 17 ++++------- .../AArch64/GlobalISel/legalize-combines.mir | 34 +++++++++++++++++++++- .../GlobalISel/legalize-nonpowerof2eltsvec.mir | 9 +++--- 3 files changed, 43 insertions(+), 17 deletions(-) diff --git a/llvm/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h b/llvm/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h index a1f564b..03af771 100644 --- a/llvm/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h +++ b/llvm/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h @@ -139,9 +139,9 @@ public: return false; unsigned NumDefs = MI.getNumOperands() - 1; - unsigned SrcReg = MI.getOperand(NumDefs).getReg(); - MachineInstr *MergeI = MRI.getVRegDef(SrcReg); - if (!MergeI || (MergeI->getOpcode() != TargetOpcode::G_MERGE_VALUES)) + MachineInstr *MergeI = getOpcodeDef(TargetOpcode::G_MERGE_VALUES, + MI.getOperand(NumDefs).getReg(), MRI); + if (!MergeI) return false; const unsigned NumMergeRegs = MergeI->getNumOperands() - 1; @@ -253,11 +253,8 @@ private: // and as a result, %3, %2, %1 are dead. MachineInstr *PrevMI = &MI; while (PrevMI != &DefMI) { - // If we're dealing with G_UNMERGE_VALUES, tryCombineMerges doesn't really try - // to fold copies in between and we can ignore them here. - if (PrevMI->getOpcode() == TargetOpcode::G_UNMERGE_VALUES) - break; - unsigned PrevRegSrc = PrevMI->getOperand(1).getReg(); + unsigned PrevRegSrc = + PrevMI->getOperand(PrevMI->getNumOperands() - 1).getReg(); MachineInstr *TmpDef = MRI.getVRegDef(PrevRegSrc); if (MRI.hasOneUse(PrevRegSrc)) { if (TmpDef != &DefMI) { @@ -269,9 +266,7 @@ private: break; PrevMI = TmpDef; } - if ((PrevMI == &DefMI || - DefMI.getOpcode() == TargetOpcode::G_MERGE_VALUES) && - MRI.hasOneUse(DefMI.getOperand(0).getReg())) + if (PrevMI == &DefMI && MRI.hasOneUse(DefMI.getOperand(0).getReg())) DeadInsts.push_back(&DefMI); } diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-combines.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-combines.mir index 9dd68eb..f9b54de 100644 --- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-combines.mir +++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-combines.mir @@ -8,6 +8,7 @@ define void @test_combines_3() { ret void } define void @test_combines_4() { ret void } define void @test_combines_5() { ret void } + define void @test_combines_6() { ret void } ... --- @@ -85,7 +86,38 @@ body: | %1:_(s32) = G_ADD %0, %0 %2:_(s64) = G_MERGE_VALUES %0, %1 - %3:_(s32), %4:_(s32) = G_UNMERGE_VALUES %2 + %6:_(s64) = COPY %2 + %7:_(s64) = COPY %6 + %8:_(s64) = COPY %7 + %3:_(s32), %4:_(s32) = G_UNMERGE_VALUES %8 + %5:_(s32) = G_ADD %3, %4 + $w0 = COPY %5 +... + +--- +name: test_combines_6 +body: | + bb.0: + liveins: $w0 + + ; CHECK-LABEL: name: test_combines_6 + ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0 + ; CHECK: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[COPY]] + ; CHECK: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[ADD]](s32) + ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY [[MV]](s64) + ; CHECK: [[COPY2:%[0-9]+]]:_(s64) = COPY [[COPY1]](s64) + ; CHECK: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[ADD]] + ; CHECK: $w0 = COPY [[ADD1]](s32) + ; CHECK: $x0 = COPY [[COPY2]](s64) + %0:_(s32) = COPY $w0 + + %1:_(s32) = G_ADD %0, %0 + %2:_(s64) = G_MERGE_VALUES %0, %1 + %6:_(s64) = COPY %2 + %7:_(s64) = COPY %6 + %8:_(s64) = COPY %7 + %3:_(s32), %4:_(s32) = G_UNMERGE_VALUES %8 %5:_(s32) = G_ADD %3, %4 $w0 = COPY %5 + $x0 = COPY %7 ... diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-nonpowerof2eltsvec.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-nonpowerof2eltsvec.mir index 72e53b5..0f8e07c 100644 --- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-nonpowerof2eltsvec.mir +++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-nonpowerof2eltsvec.mir @@ -23,12 +23,11 @@ body: | ; CHECK-LABEL: name: test_legalize_merge_v3s64 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x0 ; CHECK: [[MV:%[0-9]+]]:_(<3 x s64>) = G_MERGE_VALUES [[COPY]](s64), [[COPY]](s64), [[COPY]](s64) - ; CHECK: [[COPY1:%[0-9]+]]:_(<3 x s64>) = COPY [[MV]](<3 x s64>) - ; CHECK: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64), [[UV2:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY1]](<3 x s64>) - ; CHECK: $x0 = COPY [[UV]](s64) + ; CHECK: $x0 = COPY [[COPY]](s64) + ; CHECK: $noreg = PATCHABLE_RET [[MV]](<3 x s64>) %0(s64) = COPY $x0 %1(<3 x s64>) = G_MERGE_VALUES %0(s64), %0(s64), %0(s64) - %2(<3 x s64>) = COPY %1(<3 x s64>) - %3(s64), %4(s64), %5(s64) = G_UNMERGE_VALUES %2(<3 x s64>) + %2(s64), %3(s64), %4(s64) = G_UNMERGE_VALUES %1(<3 x s64>) $x0 = COPY %3(s64) + $noreg = PATCHABLE_RET %1(<3 x s64>) ... -- 2.7.4