From 3bd6e4d90ff6ead0bd7a99ff55c4bf50e21a86e6 Mon Sep 17 00:00:00 2001 From: Jian Hu Date: Tue, 18 Dec 2018 16:17:57 +0800 Subject: [PATCH] clk: txl: fix gpu clock can not be changed [1/1] PD#SWPL-2909 Problem: The gpu clock rate can not be changed. Solution: 1.it called meson_init_gpu function which used by txlx in txl clock driver, change it to meson_txl_gpu_init function. 2.the /sys/kernel/debug/aml_clk/clk_test node can not work in txl platform, Initial value for clk_numbers which needed by clk_test driver. Verify: test passed on P321 Change-Id: Iade63691edf5b39325f34abb4789d48d33339329 Signed-off-by: Jian Hu --- drivers/amlogic/clk/txl/txl.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/amlogic/clk/txl/txl.c b/drivers/amlogic/clk/txl/txl.c index c0bc223..79941f3 100644 --- a/drivers/amlogic/clk/txl/txl.c +++ b/drivers/amlogic/clk/txl/txl.c @@ -945,7 +945,6 @@ static void __init txl_clkc_init(struct device_node *np) pr_err("%s: Unable to map clk base\n", __func__); return; } - /* Populate base address for PLLs */ for (i = 0; i < ARRAY_SIZE(txl_clk_plls); i++) txl_clk_plls[i]->base = clk_base; @@ -994,6 +993,7 @@ static void __init txl_clkc_init(struct device_node *np) clk_data.clks = clks; clk_data.clk_num = NR_CLKS; + clk_numbers = NR_CLKS; /*register all clks*/ for (clkid = 0; clkid < CLOCK_GATE; clkid++) { @@ -1005,7 +1005,7 @@ static void __init txl_clkc_init(struct device_node *np) meson_txl_sdemmc_init(); meson_txl_media_init(); - meson_init_gpu(); + meson_txl_gpu_init(); parent_hw = clk_hw_get_parent(&txl_cpu_clk.mux.hw); parent_clk = parent_hw->clk; -- 2.7.4