From 3b91657c7bc1e1fcf3f8374f71c238f432050947 Mon Sep 17 00:00:00 2001 From: Min-Yih Hsu Date: Wed, 20 Apr 2022 20:17:07 -0700 Subject: [PATCH] [mlir][LLVMIR] Add support for translating from some simple LLVM instructions Add support for translating from llvm::Select, llvm::FNeg, and llvm::Unreachable. This patch also cleans up (NFC) the opcode map for simple instructions and adds `// clang-format off/on` comments to prevent those lines from being churned by clang-format between commits. Differential Revision: https://reviews.llvm.org/D125817 --- mlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp | 80 +++++++++++++++++++--------- mlir/test/Target/LLVMIR/Import/basic.ll | 19 +++++++ 2 files changed, 74 insertions(+), 25 deletions(-) diff --git a/mlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp b/mlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp index 840da68..ab69c6a 100644 --- a/mlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp +++ b/mlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp @@ -581,46 +581,73 @@ static StringRef lookupOperationNameFromOpcode(unsigned opcode) { #define INST(llvm_n, mlir_n) \ { llvm::Instruction::llvm_n, LLVM::mlir_n##Op::getOperationName() } static const DenseMap opcMap = { - // Ret is handled specially. + // clang-format off + INST(Ret, Return), // Br is handled specially. // Switch is handled specially. // FIXME: indirectbr - // FIXME: invoke + // Invoke is handled specially. INST(Resume, Resume), - // FIXME: unreachable + INST(Unreachable, Unreachable), // FIXME: cleanupret // FIXME: catchret // FIXME: catchswitch // FIXME: callbr - // FIXME: fneg - INST(Add, Add), INST(FAdd, FAdd), INST(Sub, Sub), INST(FSub, FSub), - INST(Mul, Mul), INST(FMul, FMul), INST(UDiv, UDiv), INST(SDiv, SDiv), - INST(FDiv, FDiv), INST(URem, URem), INST(SRem, SRem), INST(FRem, FRem), - INST(Shl, Shl), INST(LShr, LShr), INST(AShr, AShr), INST(And, And), - INST(Or, Or), INST(Xor, XOr), INST(Alloca, Alloca), INST(Load, Load), + INST(FNeg, FNeg), + INST(Add, Add), + INST(FAdd, FAdd), + INST(Sub, Sub), + INST(FSub, FSub), + INST(Mul, Mul), + INST(FMul, FMul), + INST(UDiv, UDiv), + INST(SDiv, SDiv), + INST(FDiv, FDiv), + INST(URem, URem), + INST(SRem, SRem), + INST(FRem, FRem), + INST(Shl, Shl), + INST(LShr, LShr), + INST(AShr, AShr), + INST(And, And), + INST(Or, Or), + INST(Xor, XOr), + INST(ExtractElement, ExtractElement), + INST(InsertElement, InsertElement), + // ShuffleVector is handled specially. + // ExtractValue is handled specially. + // InsertValue is handled specially. + INST(Alloca, Alloca), + INST(Load, Load), INST(Store, Store), - // Getelementptr is handled specially. - INST(Ret, Return), INST(Fence, Fence), + INST(Fence, Fence), // FIXME: atomiccmpxchg // FIXME: atomicrmw - INST(Trunc, Trunc), INST(ZExt, ZExt), INST(SExt, SExt), - INST(FPToUI, FPToUI), INST(FPToSI, FPToSI), INST(UIToFP, UIToFP), - INST(SIToFP, SIToFP), INST(FPTrunc, FPTrunc), INST(FPExt, FPExt), - INST(PtrToInt, PtrToInt), INST(IntToPtr, IntToPtr), - INST(BitCast, Bitcast), INST(AddrSpaceCast, AddrSpaceCast), - // FIXME: cleanuppad - // FIXME: catchpad + // Getelementptr is handled specially. + INST(Trunc, Trunc), + INST(ZExt, ZExt), + INST(SExt, SExt), + INST(FPToUI, FPToUI), + INST(FPToSI, FPToSI), + INST(UIToFP, UIToFP), + INST(SIToFP, SIToFP), + INST(FPTrunc, FPTrunc), + INST(FPExt, FPExt), + INST(PtrToInt, PtrToInt), + INST(IntToPtr, IntToPtr), + INST(BitCast, Bitcast), + INST(AddrSpaceCast, AddrSpaceCast), // ICmp is handled specially. // FCmp is handled specially. // PHI is handled specially. - INST(Freeze, Freeze), INST(Call, Call), - // FIXME: select + INST(Select, Select), + INST(Freeze, Freeze), + INST(Call, Call), // FIXME: vaarg - INST(ExtractElement, ExtractElement), INST(InsertElement, InsertElement), - // ShuffleVector is handled specially. - // InsertValue is handled specially. - // ExtractValue is handled specially. // FIXME: landingpad + // FIXME: catchpad + // FIXME: cleanuppad + // clang-format on }; #undef INST @@ -776,7 +803,10 @@ LogicalResult Importer::processInstruction(llvm::Instruction *inst) { case llvm::Instruction::Freeze: case llvm::Instruction::BitCast: case llvm::Instruction::ExtractElement: - case llvm::Instruction::InsertElement: { + case llvm::Instruction::InsertElement: + case llvm::Instruction::Select: + case llvm::Instruction::FNeg: + case llvm::Instruction::Unreachable: { OperationState state(loc, lookupOperationNameFromOpcode(inst->getOpcode())); SmallVector ops; ops.reserve(inst->getNumOperands()); diff --git a/mlir/test/Target/LLVMIR/Import/basic.ll b/mlir/test/Target/LLVMIR/Import/basic.ll index 05c09ce..6b74e7d 100644 --- a/mlir/test/Target/LLVMIR/Import/basic.ll +++ b/mlir/test/Target/LLVMIR/Import/basic.ll @@ -278,6 +278,10 @@ define void @FPArithmetic(float %a, float %b, double %c, double %d) { %10 = frem float %a, %b ; CHECK: %[[a13:[0-9]+]] = llvm.frem %arg2, %arg3 : f64 %11 = frem double %c, %d + ; CHECK: %{{.+}} = llvm.fneg %{{.+}} : f32 + %12 = fneg float %a + ; CHECK: %{{.+}} = llvm.fneg %{{.+}} : f64 + %13 = fneg double %c ret void } @@ -605,3 +609,18 @@ define <4 x half> @insert_element(<4 x half>* %vec, half %v, i32 %idx) { ; CHECK: llvm.return %[[V1]] ret <4 x half> %r } + +; Select +; CHECK-LABEL: llvm.func @select_inst +define void @select_inst(i32 %arg0, i32 %arg1, i1 %pred) { + ; CHECK: %{{.+}} = llvm.select %{{.+}}, %{{.+}}, %{{.+}} : i1, i32 + %1 = select i1 %pred, i32 %arg0, i32 %arg1 + ret void +} + +; Unreachable +; CHECK-LABEL: llvm.func @unreachable_inst +define void @unreachable_inst() { + ; CHECK: llvm.unreachable + unreachable +} -- 2.7.4