From 3b0b3def86e5d53bfe23e52888ddebfda5ede1a6 Mon Sep 17 00:00:00 2001
From: Sanjay Patel <spatel@rotateright.com>
Date: Tue, 10 Sep 2019 14:26:25 +0000
Subject: [PATCH] [ARM] auto-generate complete test checks; NFC

llvm-svn: 371524
---
 llvm/test/CodeGen/ARM/a15-partial-update.ll | 37 ++++++++++++++++++++++-------
 1 file changed, 28 insertions(+), 9 deletions(-)

diff --git a/llvm/test/CodeGen/ARM/a15-partial-update.ll b/llvm/test/CodeGen/ARM/a15-partial-update.ll
index 576eb7a..a6248b3 100644
--- a/llvm/test/CodeGen/ARM/a15-partial-update.ll
+++ b/llvm/test/CodeGen/ARM/a15-partial-update.ll
@@ -1,7 +1,6 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -O1 -mcpu=cortex-a15 -mtriple=armv7-linux-gnueabi -verify-machineinstrs < %s  | FileCheck %s
 
-; CHECK-LABEL: t1:
-define <2 x float> @t1(float* %A, <2 x float> %B) {
 ; The generated code for this test uses a vld1.32 instruction
 ; to write the lane 1 of a D register containing the value of
 ; <2 x float> %B. Since the D register is defined, it would
@@ -9,22 +8,42 @@ define <2 x float> @t1(float* %A, <2 x float> %B) {
 ; vld1.32 instruction. The test checks that a vmov.f64 was not
 ; generated.
 
-; CHECK-NOT: vmov.{{.*}} d{{[0-9]+}},
+define <2 x float> @t1(float* %A, <2 x float> %B) {
+; CHECK-LABEL: t1:
+; CHECK:       @ %bb.0:
+; CHECK-NEXT:    vmov d16, r2, r3
+; CHECK-NEXT:    vld1.32 {d16[1]}, [r0:32]
+; CHECK-NEXT:    vmov r0, r1, d16
+; CHECK-NEXT:    bx lr
   %tmp2 = load float, float* %A, align 4
   %tmp3 = insertelement <2 x float> %B, float %tmp2, i32 1
   ret <2 x float> %tmp3
 }
 
-; CHECK-LABEL: t2:
-define void @t2(<4 x i8> *%in, <4 x i8> *%out, i32 %n) {
-entry:
-  br label %loop
-loop:
 ; The code generated by this test uses a vld1.32 instruction.
 ; We check that a dependency breaking vmov* instruction was
 ; generated.
 
-; CHECK: vmov.{{.*}} d{{[0-9]+}},
+define void @t2(<4 x i8> *%in, <4 x i8> *%out, i32 %n) {
+; CHECK-LABEL: t2:
+; CHECK:       @ %bb.0: @ %entry
+; CHECK-NEXT:    add r0, r0, #4
+; CHECK-NEXT:    add r1, r1, #4
+; CHECK-NEXT:  .LBB1_1: @ %loop
+; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1
+; CHECK-NEXT:    vmov.f64 d16, #5.000000e-01
+; CHECK-NEXT:    vld1.32 {d16[0]}, [r0:32]
+; CHECK-NEXT:    vmovl.u8 q8, d16
+; CHECK-NEXT:    vuzp.8 d16, d18
+; CHECK-NEXT:    vst1.32 {d16[0]}, [r1:32]!
+; CHECK-NEXT:    add r0, r0, #4
+; CHECK-NEXT:    subs r2, r2, #1
+; CHECK-NEXT:    beq .LBB1_1
+; CHECK-NEXT:  @ %bb.2: @ %ret
+; CHECK-NEXT:    bx lr
+entry:
+  br label %loop
+loop:
   %oldcount = phi i32 [0, %entry], [%newcount, %loop]
   %newcount = add i32 %oldcount, 1
   %p1 = getelementptr <4 x i8>, <4 x i8> *%in, i32 %newcount
-- 
2.7.4