From 3a6dce778de7c120a37983d80b6ccc8c2c4ff6ec Mon Sep 17 00:00:00 2001 From: David Zhang Date: Fri, 29 Apr 2022 17:32:56 -0400 Subject: [PATCH] drm/amd/display: update GSP1 generic info packet for PSRSU [why & how] Based on PSRSU specification, every selective update frame need to use two SDP to indicate the frame active range. So we occupy another GSP1 for PSRSU execution. Signed-off-by: David Zhang Acked-by: Leo Li Reviewed-by: Harry Wentland Signed-off-by: Alex Deucher --- .../drm/amd/display/dc/dcn30/dcn30_dio_stream_encoder.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_stream_encoder.c index b683ad8..1a26ce87 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_stream_encoder.c +++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_stream_encoder.c @@ -419,6 +419,21 @@ void enc3_stream_encoder_update_dp_info_packets( &info_frame->vsc, true); } + /* TODO: VSC SDP at packetIndex 1 should be restricted only if PSR-SU on. + * There should have another Infopacket type (e.g. vsc_psrsu) for PSR_SU. + * In addition, currently the driver check the valid bit then update and + * send the corresponding Infopacket. For PSR-SU, the SDP only be sent + * while entering PSR-SU mode. So we need another parameter(e.g. send) + * in dc_info_packet to indicate which infopacket should be enabled by + * default here. + */ + if (info_frame->vsc.valid) { + enc->vpg->funcs->update_generic_info_packet( + enc->vpg, + 1, /* packetIndex */ + &info_frame->vsc, + true); + } if (info_frame->spd.valid) { enc->vpg->funcs->update_generic_info_packet( enc->vpg, -- 2.7.4