From 3a61570415690e9d5e7f10a288d25d49163f819d Mon Sep 17 00:00:00 2001 From: Alvin Lee Date: Tue, 31 Jan 2023 10:12:43 -0500 Subject: [PATCH] drm/amd/display: Fix prefetch vratio check [Why & How] - For prefetch max vratio check, use the calculated prefetch bandwidth from dml32_CalculatePrefetchSchedule instead of max prefetch bandwidth - Also multiply prefetch bandwidth by VRatio since scaling is not considered one calculating require prefetch bw Reviewed-by: Jun Lei Acked-by: Qingqing Zhuo Signed-off-by: Alvin Lee Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher --- .../amd/display/dc/dml/dcn32/display_mode_vba_32.c | 9 +++++++++ .../display/dc/dml/dcn32/display_mode_vba_util_32.c | 21 ++++++++++++++++----- .../display/dc/dml/dcn32/display_mode_vba_util_32.h | 5 ++++- 3 files changed, 29 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c index 55567b9..7a99a66 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c @@ -942,6 +942,9 @@ static void DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman v->UrgBurstFactorLumaPre, v->UrgBurstFactorChromaPre, v->UrgBurstFactorCursorPre, + v->PrefetchBandwidth, + v->VRatio, + v->MaxVRatioPre, /* output */ &MaxTotalRDBandwidth, @@ -972,6 +975,9 @@ static void DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman v->dummy_vars.DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation.dummy_unit_vector, v->dummy_vars.DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation.dummy_unit_vector, v->dummy_vars.DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation.dummy_unit_vector, + v->PrefetchBandwidth, + v->VRatio, + v->MaxVRatioPre, /* output */ &v->dummy_vars.DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation.dummy_single[0], @@ -3373,6 +3379,9 @@ void dml32_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l mode_lib->vba.UrgentBurstFactorLumaPre, mode_lib->vba.UrgentBurstFactorChromaPre, mode_lib->vba.UrgentBurstFactorCursorPre, + v->PrefetchBW, + v->VRatio, + v->MaxVRatioPre, /* output */ &v->dummy_vars.dml32_ModeSupportAndSystemConfigurationFull.dummy_single[0], // Single *PrefetchBandwidth diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c index 069e9ab..d1000aa 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c @@ -6143,9 +6143,12 @@ void dml32_CalculatePrefetchBandwithSupport(unsigned int NumberOfActiveSurfaces, double UrgentBurstFactorLumaPre[], double UrgentBurstFactorChromaPre[], double UrgentBurstFactorCursorPre[], + double PrefetchBW[], + double VRatio[], + double MaxVRatioPre, /* output */ - double *PrefetchBandwidth, + double *MaxPrefetchBandwidth, double *FractionOfUrgentBandwidth, bool *PrefetchBandwidthSupport) { @@ -6153,25 +6156,33 @@ void dml32_CalculatePrefetchBandwithSupport(unsigned int NumberOfActiveSurfaces, double ActiveBandwidthPerSurface; bool NotEnoughUrgentLatencyHiding = false; double TotalActiveBandwidth = 0; + double TotalPrefetchBandwidth = 0; + for (k = 0; k < NumberOfActiveSurfaces; ++k) { if (NotUrgentLatencyHiding[k]) { NotEnoughUrgentLatencyHiding = true; } } - *PrefetchBandwidth = 0; + *MaxPrefetchBandwidth = 0; for (k = 0; k < NumberOfActiveSurfaces; ++k) { ActiveBandwidthPerSurface = ReadBandwidthLuma[k] * UrgentBurstFactorLuma[k] + ReadBandwidthChroma[k] * UrgentBurstFactorChroma[k] + cursor_bw[k] * UrgentBurstFactorCursor[k] + NumberOfDPP[k] * (meta_row_bandwidth[k] + dpte_row_bandwidth[k]); TotalActiveBandwidth += ActiveBandwidthPerSurface; - *PrefetchBandwidth = *PrefetchBandwidth + dml_max3(NumberOfDPP[k] * prefetch_vmrow_bw[k], + TotalPrefetchBandwidth = TotalPrefetchBandwidth + PrefetchBW[k] * VRatio[k]; + + *MaxPrefetchBandwidth = *MaxPrefetchBandwidth + dml_max3(NumberOfDPP[k] * prefetch_vmrow_bw[k], ActiveBandwidthPerSurface, NumberOfDPP[k] * (PrefetchBandwidthLuma[k] * UrgentBurstFactorLumaPre[k] + PrefetchBandwidthChroma[k] * UrgentBurstFactorChromaPre[k]) + cursor_bw_pre[k] * UrgentBurstFactorCursorPre[k]); } - *PrefetchBandwidthSupport = (*PrefetchBandwidth <= ReturnBW) && (*PrefetchBandwidth <= TotalActiveBandwidth * __DML_MAX_BW_RATIO_PRE__) && !NotEnoughUrgentLatencyHiding; - *FractionOfUrgentBandwidth = *PrefetchBandwidth / ReturnBW; + if (MaxVRatioPre == __DML_MAX_VRATIO_PRE__) + *PrefetchBandwidthSupport = (*MaxPrefetchBandwidth <= ReturnBW) && (TotalPrefetchBandwidth <= TotalActiveBandwidth * __DML_MAX_BW_RATIO_PRE__) && !NotEnoughUrgentLatencyHiding; + else + *PrefetchBandwidthSupport = (*MaxPrefetchBandwidth <= ReturnBW) && !NotEnoughUrgentLatencyHiding; + + *FractionOfUrgentBandwidth = *MaxPrefetchBandwidth / ReturnBW; } double dml32_CalculateBandwidthAvailableForImmediateFlip(unsigned int NumberOfActiveSurfaces, diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.h b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.h index d41c4d8..9ba792c 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.h +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.h @@ -1096,9 +1096,12 @@ void dml32_CalculatePrefetchBandwithSupport(unsigned int NumberOfActiveSurfaces, double UrgentBurstFactorLumaPre[], double UrgentBurstFactorChromaPre[], double UrgentBurstFactorCursorPre[], + double PrefetchBW[], + double VRatio[], + double MaxVRatioPre, /* output */ - double *PrefetchBandwidth, + double *MaxPrefetchBandwidth, double *FractionOfUrgentBandwidth, bool *PrefetchBandwidthSupport); -- 2.7.4