From 39b96089cfdb103c0a4e8b595bb34632861b560e Mon Sep 17 00:00:00 2001 From: Lokesh Gupta Date: Tue, 15 Nov 2011 15:24:37 +0100 Subject: [PATCH] [PORT FROM R2] atomisp: improved format of debug info for CSS BZ: 17272 When ISP timeout happens, it is possible to dump the debug information from ISP. This patch improves the format of this dump. Major improvements: - FIFO states are now correct, bugs fixed in code - FIFO states from ISP to GDC are also printed now - Change in CSS API to pass context info for debug Change-Id: I550f6951f1189a924cebe2b0267d6627352e13b0 Orig-Change-Id: I3cf80dcd2ba4ed4301285cac734b0a0d99126a13 Reviewed-on: http://android.intel.com:8080/24397 Reviewed-by: Gupta, Lokesh Reviewed-by: Von Oerthel, Jurgen Tested-by: Koski, Anttu Reviewed-by: Wang, Wen W Reviewed-by: Cohen, David A Reviewed-by: Toivonen, Tuukka Reviewed-by: buildbot Tested-by: buildbot Reviewed-on: http://android.intel.com:8080/28007 Reviewed-by: Tuominen, TeemuX Reviewed-by: Koski, Anttu --- drivers/media/video/atomisp/atomisp_cmd.c | 6 +- drivers/media/video/atomisp/css/sh_css_debug.c | 633 +++++++++++++++---------- drivers/media/video/atomisp/css/sh_css_debug.h | 2 +- drivers/media/video/atomisp/css/sh_css_hrt.c | 64 ++- drivers/media/video/atomisp/css/sh_css_hrt.h | 5 +- 5 files changed, 431 insertions(+), 279 deletions(-) diff --git a/drivers/media/video/atomisp/atomisp_cmd.c b/drivers/media/video/atomisp/atomisp_cmd.c index 2700bdf..0fcaa53 100644 --- a/drivers/media/video/atomisp/atomisp_cmd.c +++ b/drivers/media/video/atomisp/atomisp_cmd.c @@ -489,11 +489,14 @@ static void atomisp_pipe_reset(struct atomisp_device *isp) static int atomisp_timeout_handler(struct atomisp_device *isp, int cnt) { u32 rx_infos; + char debug_context[64]; v4l2_err(&atomisp_dev, "ISP timeout\n"); - isp->isp_timeout = true; + snprintf(debug_context, 64, "ISP timeout encountered (%d of 5)", cnt); + sh_css_dump_debug_info(debug_context); + /* Try 5 times for autorecovery */ if (cnt < 5) { atomisp_pipe_reset(isp); @@ -508,7 +511,6 @@ static int atomisp_timeout_handler(struct atomisp_device *isp, int cnt) v4l2_err(&atomisp_dev, "error: lost interrupt\n"); - sh_css_dump_debug_info(); print_csi_rx_errors(); sh_css_rx_get_interrupt_info(&rx_infos); sh_css_rx_clear_interrupt_info(rx_infos); diff --git a/drivers/media/video/atomisp/css/sh_css_debug.c b/drivers/media/video/atomisp/css/sh_css_debug.c index 05a4023..aaf97d1 100644 --- a/drivers/media/video/atomisp/css/sh_css_debug.c +++ b/drivers/media/video/atomisp/css/sh_css_debug.c @@ -31,34 +31,48 @@ static void print_cell_state(struct sh_css_cell_state *state, const char *cell) { sh_css_print("%s state:\n", cell); - sh_css_print(" PC: 0x%x\n", state->pc); - sh_css_print(" Status register : 0x%x\n", state->status_register); - sh_css_print(" is broken: %d\n", state->is_broken); - sh_css_print(" is idle: %d\n", state->is_idle); - sh_css_print(" is sleeping: %d\n", state->is_sleeping); - sh_css_print(" is stalling: %d\n", state->is_stalling); + sh_css_print("\t%-32s: 0x%X\n", "PC", state->pc); + sh_css_print("\t%-32s: 0x%X\n", "Status register", + state->status_register); + sh_css_print("\t%-32s: %d\n", "Is broken", state->is_broken); + sh_css_print("\t%-32s: %d\n", "Is idle", state->is_idle); + sh_css_print("\t%-32s: %d\n", "Is sleeping", state->is_sleeping); + sh_css_print("\t%-32s: %d\n", "Is stalling", state->is_stalling); } void sh_css_dump_isp_state(void) { - struct sh_css_cell_state state; + struct sh_css_cell_state state; struct sh_css_isp_stall_state stall_state; + sh_css_hrt_isp_get_state(&state, &stall_state); + print_cell_state(&state, "ISP"); + if (state.is_stalling) { - sh_css_print(" FIFO 0 stalled: %d\n", stall_state.fifo0); - sh_css_print(" FIFO 1 stalled: %d\n", stall_state.fifo1); - sh_css_print(" FIFO 2 stalled: %d\n", stall_state.fifo2); - sh_css_print(" FIFO 3 stalled: %d\n", stall_state.fifo3); - sh_css_print(" FIFO 4 stalled: %d\n", stall_state.fifo4); - sh_css_print(" FIFO 5 stalled: %d\n", stall_state.fifo5); - sh_css_print(" status & control stalled: %d\n", + sh_css_print("\t%-32s: %d\n", "[0] if_prim_A_FIFO stalled", + stall_state.fifo0); + sh_css_print("\t%-32s: %d\n", "[1] if_prim_b_FIFO stalled", + stall_state.fifo1); + sh_css_print("\t%-32s: %d\n", "[2] dma_FIFO stalled", + stall_state.fifo2); + sh_css_print("\t%-32s: %d\n", "[3] gdc_FIFO stalled", + stall_state.fifo3); + sh_css_print("\t%-32s: %d\n", "[4] gpio_FIFO stalled", + stall_state.fifo4); + sh_css_print("\t%-32s: %d\n", "[5] sp_FIFO stalled", + stall_state.fifo5); + sh_css_print("\t%-32s: %d\n", "status & control stalled", stall_state.stat_ctrl); - sh_css_print(" dmem stalled: %d\n", stall_state.dmem); - sh_css_print(" vmem stalled: %d\n", stall_state.vmem); - sh_css_print(" vamem1 stalled: %d\n", stall_state.vamem1); - sh_css_print(" vamem2 stalled: %d\n", stall_state.vamem2); + sh_css_print("\t%-32s: %d\n", "dmem stalled", + stall_state.dmem); + sh_css_print("\t%-32s: %d\n", "vmem stalled", + stall_state.vmem); + sh_css_print("\t%-32s: %d\n", "vamem1 stalled", + stall_state.vamem1); + sh_css_print("\t%-32s: %d\n", "vamem2 stalled", + stall_state.vamem2); } } @@ -70,26 +84,27 @@ sh_css_dump_sp_state(void) sh_css_hrt_sp_get_state(&state, &stall_state); print_cell_state(&state, "SP"); if (state.is_stalling) { - sh_css_print(" if_prim_FIFO stalled: %d\n", + sh_css_print("\t%-32s: %d\n", "if_prim_FIFO stalled", stall_state.fifo0); - sh_css_print(" if_sec_FIFO stalled: %d\n", + sh_css_print("\t%-32s: %d\n", "if_sec_FIFO stalled", stall_state.fifo1); - sh_css_print(" str_to_mem_FIFO stalled: %d\n", + sh_css_print("\t%-32s: %d\n", "str_to_mem_FIFO stalled", stall_state.fifo2); - sh_css_print(" dma_FIFO stalled: %d\n", + sh_css_print("\t%-32s: %d\n", "dma_FIFO stalled", stall_state.fifo3); - sh_css_print(" gdc_FIFO stalled: %d\n", + sh_css_print("\t%-32s: %d\n", "gdc_FIFO stalled", stall_state.fifo4); - sh_css_print(" isp_FIFO stalled: %d\n", + sh_css_print("\t%-32s: %d\n", "isp_FIFO stalled", stall_state.fifo5); - sh_css_print(" gp_FIFO stalled: %d\n", + sh_css_print("\t%-32s: %d\n", "gp_FIFO stalled", stall_state.fifo6); - sh_css_print(" if_prim_b_FIFO stalled: %d\n", + sh_css_print("\t%-32s: %d\n", "if_prim_b_FIFO stalled", stall_state.fifo7); - sh_css_print(" dmem stalled: %d\n", stall_state.dmem); - sh_css_print(" control master stalled: %d\n", + sh_css_print("\t%-32s: %d\n", "dmem stalled", + stall_state.dmem); + sh_css_print("\t%-32s: %d\n", "control master stalled", stall_state.control_master); - sh_css_print(" i-cache master stalled: %d\n", + sh_css_print("\t%-32s: %d\n", "i-cache master stalled", stall_state.icache_master); } } @@ -98,150 +113,174 @@ static void print_if_state(struct sh_css_if_state *state) { unsigned int val; + + const char *st_reset = (state->reset ? "Active" : "Not active"); + const char *st_vsalow = (state->vsync_active_low ? "low" : "high"); + const char *st_hsalow = (state->hsync_active_low ? "low" : "high"); + + const char *fsm_sync_status_str = "unknown"; + const char *fsm_crop_status_str = "unknown"; + const char *fsm_padding_status_str = "unknown"; + + int st_stline = state->start_line; + int st_stcol = state->start_column; + int st_crpht = state->cropped_height; + int st_crpwd = state->cropped_width; + int st_verdcm = state->ver_decimation; + int st_hordcm = state->hor_decimation; + int st_deintr = state->deinterleaving; + int st_leftpd = state->left_padding; + int st_eoloff = state->eol_offset; + int st_vmstad = state->vmem_start_address; + int st_vmenad = state->vmem_end_address; + int st_vmincr = state->vmem_increment; + int st_yuv420 = state->yuv420; + sh_css_print("InputFormatter State:\n"); - sh_css_print(" Configuration:\n"); - sh_css_print(" Software reset: %s\n", - state->reset ? "Active" : "Not active"); - sh_css_print(" Start line: %d\n", state->start_line); - sh_css_print(" Start column: %d\n", - state->start_column); - sh_css_print(" Cropped height: %d\n", - state->cropped_height); - sh_css_print(" Cropped width: %d\n", - state->cropped_width); - sh_css_print(" Vertical decimation: %d\n", - state->ver_decimation); - sh_css_print(" Horizontal decimation: %d\n", - state->hor_decimation); - sh_css_print(" Deinterleaving: %d\n", - state->deinterleaving); - sh_css_print(" Left padding: %d\n", - state->left_padding); - sh_css_print(" End-of-line offset (bytes): %d\n", - state->eol_offset); - sh_css_print(" VMEM start address: 0x%06X\n", - state->vmem_start_address); - sh_css_print(" VMEM end address: 0x%06X\n", - state->vmem_end_address); - sh_css_print(" VMEM increment: 0x%06X\n", - state->vmem_increment); - sh_css_print(" YUV 420 format: %d\n", state->yuv420); - sh_css_print(" Vsync: Active %s\n", - state->vsync_active_low ? "low" : "high"); - sh_css_print(" Hsync: Active %s\n", - state->hsync_active_low ? "low" : "high"); -#if 0 - /* not supported on css_dev */ - sh_css_print(" Sensor stalling: %s\n", - state->allow_fifo_overflow ? "Allowed" : "Not allowed"); -#endif - sh_css_print(" FSM Status\n"); + + sh_css_print("\tConfiguration:\n"); + + sh_css_print("\t\t%-32s: %s\n" , "Software reset" , st_reset); + sh_css_print("\t\t%-32s: %d\n" , "Start line" , st_stline); + sh_css_print("\t\t%-32s: %d\n" , "Start column" , st_stcol); + sh_css_print("\t\t%-32s: %d\n" , "Cropped height" , st_crpht); + sh_css_print("\t\t%-32s: %d\n" , "Cropped width" , st_crpwd); + sh_css_print("\t\t%-32s: %d\n" , "Ver decimation" , st_verdcm); + sh_css_print("\t\t%-32s: %d\n" , "Hor decimation" , st_hordcm); + sh_css_print("\t\t%-32s: %d\n" , "Deinterleaving" , st_deintr); + sh_css_print("\t\t%-32s: %d\n" , "Left padding" , st_leftpd); + sh_css_print("\t\t%-32s: %d\n" , "EOL offset (bytes)", st_eoloff); + sh_css_print("\t\t%-32s: 0x%06X\n" , "VMEM start address", st_vmstad); + sh_css_print("\t\t%-32s: 0x%06X\n" , "VMEM end address" , st_vmenad); + sh_css_print("\t\t%-32s: 0x%06X\n" , "VMEM increment" , st_vmincr); + sh_css_print("\t\t%-32s: %d\n" , "YUV 420 format" , st_yuv420); + sh_css_print("\t\t%-32s: Active %s\n", "Vsync" , st_vsalow); + sh_css_print("\t\t%-32s: Active %s\n", "Hsync" , st_hsalow); + + sh_css_print("\tFSM Status:\n"); + val = state->fsm_sync_status; - sh_css_print(" FSM Synchronization Status 0x%X: ", val); + if (val > 7) - sh_css_print("ERROR : "); + fsm_sync_status_str = "ERROR"; switch (val & 0x7) { case 0: - sh_css_print("idle\n"); + fsm_sync_status_str = "idle"; break; case 1: - sh_css_print("request frame\n"); + fsm_sync_status_str = "request frame"; break; case 2: - sh_css_print("request lines\n"); + fsm_sync_status_str = "request lines"; break; case 3: - sh_css_print("request vectors\n"); + fsm_sync_status_str = "request vectors"; break; case 4: - sh_css_print("send acknowledge\n"); + fsm_sync_status_str = "send acknowledge"; break; default: - sh_css_print("unknown\n"); + fsm_sync_status_str = "unknown"; break; } - sh_css_print(" FSM Synchronization Counter %d\n", - state->fsm_sync_counter); + sh_css_print("\t\t%-32s: (0x%X: %s)\n", + "FSM Synchronization Status", val, fsm_sync_status_str); + + sh_css_print("\t\t%-32s: %d\n", + "FSM Synchronization Counter", state->fsm_sync_counter); + val = state->fsm_crop_status; - sh_css_print(" FSM Crop Status 0x%X: ", - val); + if (val > 7) - sh_css_print("ERROR : "); + fsm_crop_status_str = "ERROR"; + switch (val & 0x7) { case 0: - sh_css_print("idle\n"); + fsm_crop_status_str = "idle"; break; case 1: - sh_css_print("wait line\n"); + fsm_crop_status_str = "wait line"; break; case 2: - sh_css_print("crop line\n"); + fsm_crop_status_str = "crop line"; break; case 3: - sh_css_print("crop pixel\n"); + fsm_crop_status_str = "crop pixel"; break; case 4: - sh_css_print("pass pixel\n"); + fsm_crop_status_str = "pass pixel"; break; case 5: - sh_css_print("pass line\n"); + fsm_crop_status_str = "pass line"; break; case 6: - sh_css_print("lost line\n"); + fsm_crop_status_str = "lost line"; break; default: - sh_css_print("unknown\n"); + fsm_crop_status_str = "unknown"; break; } + sh_css_print("\t\t%-32s: (0x%X: %s)\n", + "FSM Crop Status", val, fsm_crop_status_str); - sh_css_print(" FSM Crop Line Counter %d\n", + sh_css_print("\t\t%-32s: %d\n", + "FSM Crop Line Counter", state->fsm_crop_line_counter); - sh_css_print(" FSM Crop Pixel Counter %d\n", + sh_css_print("\t\t%-32s: %d\n", + "FSM Crop Pixel Counter", state->fsm_crop_pixel_counter); - sh_css_print(" FSM Deinterleaving idx buffer %d\n", + sh_css_print("\t\t%-32s: %d\n", + "FSM Deinterleaving idx buffer", state->fsm_deinterleaving_index); - sh_css_print(" FSM Decimation H decimation counter %d\n", + sh_css_print("\t\t%-32s: %d\n", + "FSM H decimation counter", state->fsm_dec_h_counter); - sh_css_print(" FSM Decimation V decimation counter %d\n", + sh_css_print("\t\t%-32s: %d\n", + "FSM V decimation counter", state->fsm_dec_v_counter); - sh_css_print(" FSM Decimation block V decimation counter %d\n", + sh_css_print("\t\t%-32s: %d\n", + "FSM block V decimation counter", state->fsm_dec_block_v_counter); val = state->fsm_padding_status; - sh_css_print(" FSM Padding Status 0x%X: ", val); + if (val > 7) - sh_css_print("ERROR : "); + fsm_padding_status_str = "ERROR"; switch (val & 0x7) { case 0: - sh_css_print("idle\n"); + fsm_padding_status_str = "idle"; break; case 1: - sh_css_print("left pad\n"); + fsm_padding_status_str = "left pad"; break; case 2: - sh_css_print("write\n"); + fsm_padding_status_str = "write"; break; case 3: - sh_css_print("right pad\n"); + fsm_padding_status_str = "right pad"; break; case 4: - sh_css_print("send end of line\n"); + fsm_padding_status_str = "send end of line"; break; default: - sh_css_print("unknown\n"); + fsm_padding_status_str = "unknown"; break; } - sh_css_print("FSM Padding element index counter %d\n", + + sh_css_print("\t\t%-32s: (0x%X: %s)\n", "FSM Padding Status", + val, fsm_padding_status_str); + + sh_css_print("\t\t%-32s: %d\n", "FSM Padding element idx counter", state->fsm_padding_elem_counter); - sh_css_print("FSM Vector support error %d\n", + sh_css_print("\t\t%-32s: %d\n", "FSM Vector support error", state->fsm_vector_support_error); - sh_css_print("FSM Vector support buf full %d\n", + sh_css_print("\t\t%-32s: %d\n", "FSM Vector support buf full", state->fsm_vector_buffer_full); - sh_css_print("FSM Vector support %d\n", + sh_css_print("\t\t%-32s: %d\n", "FSM Vector support", state->vector_support); - sh_css_print("Fifo sensor data lost %d\n", + sh_css_print("\t\t%-32s: %d\n", "Fifo sensor data lost", state->sensor_data_lost); } @@ -260,182 +299,256 @@ sh_css_dump_dma_state(void) struct sh_css_dma_state state; int i, ch_id, num_ports = 3, num_channels = 8; + const char *fsm_cmd_st_lbl = "FSM Command flag state"; + const char *fsm_ctl_st_lbl = "FSM Control flag state"; + const char *fsm_ctl_state = NULL; + const char *fsm_ctl_flag = NULL; + const char *fsm_pack_st = NULL; + const char *fsm_read_st = NULL; + const char *fsm_write_st = NULL; + char last_cmd_str[64]; + sh_css_hrt_dma_get_state(&state); - sh_css_print("DMA dump status:\n\t"); - sh_css_print("FSM Command flag state:\n\t\t"); + /* Print header for DMA dump status */ + sh_css_print("DMA dump status:\n"); + + /* Print FSM command flag state */ if (state.fsm_command_idle) - sh_css_print("IDLE\n\t\t"); + sh_css_print("\t%-32s: %s\n", fsm_cmd_st_lbl, "IDLE"); if (state.fsm_command_run) - sh_css_print("RUN\n\t\t"); + sh_css_print("\t%-32s: %s\n", fsm_cmd_st_lbl, "RUN"); if (state.fsm_command_stalling) - sh_css_print("STALL\n\t\t"); + sh_css_print("\t%-32s: %s\n", fsm_cmd_st_lbl, "STALL"); if (state.fsm_command_error) - sh_css_print("ERROR\n\t\t"); + sh_css_print("\t%-32s: %s\n", fsm_cmd_st_lbl, "ERROR"); + + /* Print last command along with the channel */ ch_id = state.last_command_channel; - sh_css_print("last command received (0x%x) : ", state.last_command); - if (state.last_command == sh_css_dma_command_read) - sh_css_print(" Read 2D Block with settings from ch:%d", ch_id); - if (state.last_command == sh_css_dma_command_write) - sh_css_print(" Write 2D Block with settings from ch:%d", ch_id); - if (state.last_command == sh_css_dma_command_set_channel) - sh_css_print(" Set Channel:%d", ch_id); - if (state.last_command == sh_css_dma_command_set_param) - sh_css_print(" Set Param:%d on Channel:%d", - state.last_command_param, ch_id); - if (state.last_command == sh_css_dma_command_read_spec) - sh_css_print(" Read Specific 2D Block on ch:%d", ch_id); - if (state.last_command == sh_css_dma_command_write_spec) - sh_css_print(" Write Specific 2D Block on ch:%d", ch_id); - if (state.last_command == sh_css_dma_command_init) - sh_css_print(" Init 2D Block on Device A on ch:%d", ch_id); - if (state.last_command == sh_css_dma_command_init_spec) - sh_css_print(" Init Specific 2D Block on ch:%d", ch_id); - if (state.last_command == sh_css_dma_command_reset) - sh_css_print(" DMA SW Reset"); - sh_css_print("\n\t"); - sh_css_print("DMA registers, connection group 0\n\t"); - sh_css_print("Cmd Fifo Command 0x%x\n\t\t", state.current_command); - sh_css_print("Cmd Fifo Address A 0x%x\n\t\t", state.current_addr_a); - sh_css_print("Cmd Fifo Address B 0x%x\n\t\t", state.current_addr_b); - sh_css_print("FSM Ctrl flag and state:\n\t\t\t"); + + switch (state.last_command) { + case sh_css_dma_command_read: + snprintf(last_cmd_str, 64, + "Read 2D Block [Channel: %d]", ch_id); + break; + case sh_css_dma_command_write: + snprintf(last_cmd_str, 64, + "Write 2D Block [Channel: %d]", ch_id); + break; + case sh_css_dma_command_set_channel: + snprintf(last_cmd_str, 64, + "Set Channel [Channel: %d]", ch_id); + break; + case sh_css_dma_command_set_param: + snprintf(last_cmd_str, 64, + "Set Param: %d [Channel: %d]", + state.last_command_param, ch_id); + break; + case sh_css_dma_command_read_spec: + snprintf(last_cmd_str, 64, + "Read Specific 2D Block [Channel: %d]", ch_id); + break; + case sh_css_dma_command_write_spec: + snprintf(last_cmd_str, 64, + "Write Specific 2D Block [Channel: %d]", ch_id); + break; + case sh_css_dma_command_init: + snprintf(last_cmd_str, 64, + "Init 2D Block on Device A [Channel: %d]", ch_id); + break; + case sh_css_dma_command_init_spec: + snprintf(last_cmd_str, 64, + "Init Specific 2D Block [Channel: %d]", ch_id); + break; + case sh_css_dma_command_reset: + snprintf(last_cmd_str, 64, + "DMA SW Reset"); + break; + } + sh_css_print("\t%-32s: (0x%X : %s)\n", "last command received", + state.last_command, last_cmd_str); + + /* Print DMA registers */ + sh_css_print("\t%-32s\n", "DMA registers, connection group 0"); + sh_css_print("\t\t%-32s: 0x%X\n", "Cmd Fifo Command", + state.current_command); + sh_css_print("\t\t%-32s: 0x%X\n", "Cmd Fifo Address A", + state.current_addr_a); + sh_css_print("\t\t%-32s: 0x%X\n", "Cmd Fifo Address B", + state.current_addr_b); + if (state.fsm_ctrl_idle) - sh_css_print("IDLE -> "); - if (state.fsm_ctrl_run) - sh_css_print("RUN -> "); - if (state.fsm_ctrl_stalling) - sh_css_print("STALL -> "); - if (state.fsm_ctrl_error) - sh_css_print("ERROR -> "); - if (state.fsm_ctrl_state == sh_css_dma_ctrl_state_idle) - sh_css_print("Idle state\n\t\t"); - if (state.fsm_ctrl_state == sh_css_dma_ctrl_state_req_rcv) - sh_css_print("Req Rcv state\n\t\t"); - if (state.fsm_ctrl_state == sh_css_dma_ctrl_state_rcv) - sh_css_print("Rcv state\n\t\t"); - if (state.fsm_ctrl_state == sh_css_dma_ctrl_state_rcv_req) - sh_css_print("Rcv Req state\n\t\t"); - if (state.fsm_ctrl_state == sh_css_dma_ctrl_state_init) - sh_css_print("Init state\n\t\t"); - sh_css_print("FSM Ctrl source dev : %d\n\t\t", + fsm_ctl_flag = "IDLE"; + else if (state.fsm_ctrl_run) + fsm_ctl_flag = "RUN"; + else if (state.fsm_ctrl_stalling) + fsm_ctl_flag = "STAL"; + else if (state.fsm_ctrl_error) + fsm_ctl_flag = "ERROR"; + else + fsm_ctl_flag = "UNKNOWN"; + + switch (state.fsm_ctrl_state) { + case sh_css_dma_ctrl_state_idle: + fsm_ctl_state = "Idle state"; + break; + case sh_css_dma_ctrl_state_req_rcv: + fsm_ctl_state = "Req Rcv state"; + break; + case sh_css_dma_ctrl_state_rcv: + fsm_ctl_state = "Rcv state"; + break; + case sh_css_dma_ctrl_state_rcv_req: + fsm_ctl_state = "Rcv Req state"; + break; + case sh_css_dma_ctrl_state_init: + fsm_ctl_state = "Init state"; + break; + } + + sh_css_print("\t\t%-32s: %s -> %s\n", fsm_ctl_st_lbl, + fsm_ctl_flag, fsm_ctl_state); + + sh_css_print("\t\t%-32s: %d\n", "FSM Ctrl source dev", state.fsm_ctrl_source_dev); - sh_css_print("FSM Ctrl source addr : 0x%x\n\t\t", + sh_css_print("\t\t%-32s: 0x%X\n", "FSM Ctrl source addr", state.fsm_ctrl_source_addr); - sh_css_print("FSM Ctrl source stride : 0x%x\n\t\t", + sh_css_print("\t\t%-32s: 0x%X\n", "FSM Ctrl source stride", state.fsm_ctrl_source_stride); - sh_css_print("FSM Ctrl source width : %d\n\t\t", + sh_css_print("\t\t%-32s: %d\n", "FSM Ctrl source width", state.fsm_ctrl_source_width); - sh_css_print("FSM Ctrl source height : %d\n\t\t", + sh_css_print("\t\t%-32s: %d\n", "FSM Ctrl source height", state.fsm_ctrl_source_height); - sh_css_print("FSM Ctrl pack source dev : %d\n\t\t", + sh_css_print("\t\t%-32s: %d\n", "FSM Ctrl pack source dev", state.fsm_ctrl_pack_source_dev); - sh_css_print("FSM Ctrl pack dest dev : %d\n\t\t", + sh_css_print("\t\t%-32s: %d\n", "FSM Ctrl pack dest dev", state.fsm_ctrl_pack_dest_dev); - sh_css_print("FSM Ctrl dest addr : 0x%x\n\t\t", + sh_css_print("\t\t%-32s: 0x%X\n", "FSM Ctrl dest addr", state.fsm_ctrl_dest_addr); - sh_css_print("FSM Ctrl dest stride : 0x%x\n\t\t", + sh_css_print("\t\t%-32s: 0x%X\n", "FSM Ctrl dest stride", state.fsm_ctrl_dest_stride); - sh_css_print("FSM Ctrl pack source width : %d\n\t\t", + sh_css_print("\t\t%-32s: %d\n", "FSM Ctrl pack source width", state.fsm_ctrl_pack_source_width); - sh_css_print("FSM Ctrl pack dest height : %d\n\t\t", + sh_css_print("\t\t%-32s: %d\n", "FSM Ctrl pack dest height", state.fsm_ctrl_pack_dest_height); - sh_css_print("FSM Ctrl pack dest width : %d\n\t\t", + sh_css_print("\t\t%-32s: %d\n", "FSM Ctrl pack dest width", state.fsm_ctrl_pack_dest_width); - sh_css_print("FSM Ctrl pack source elems : %d\n\t\t", + sh_css_print("\t\t%-32s: %d\n", "FSM Ctrl pack source elems", state.fsm_ctrl_pack_source_elems); - sh_css_print("FSM Ctrl pack dest elems : %d\n\t\t", + sh_css_print("\t\t%-32s: %d\n", "FSM Ctrl pack dest elems", state.fsm_ctrl_pack_dest_elems); - sh_css_print("FSM Ctrl pack extension : %d\n\t\t", + sh_css_print("\t\t%-32s: %d\n", "FSM Ctrl pack extension", state.fsm_ctrl_pack_extension); - sh_css_print("FSM Pack flag state\t\t\t"); + if (state.pack_idle) - sh_css_print("IDLE\t\t"); + fsm_pack_st = "IDLE"; if (state.pack_run) - sh_css_print("RUN\t\t"); + fsm_pack_st = "RUN"; if (state.pack_stalling) - sh_css_print("STALL\t\t"); + fsm_pack_st = "STALL"; if (state.pack_error) - sh_css_print("ERROR\t\t"); - sh_css_print("FSM Pack cnt height : %d\n\t\t", + fsm_pack_st = "ERROR"; + + sh_css_print("\t\t%-32s: %s\n", "FSM Pack flag state", fsm_pack_st); + + sh_css_print("\t\t%-32s: %d\n", "FSM Pack cnt height", state.pack_cnt_height); - sh_css_print("FSM Pack src cnt width : %d\n\t\t", + sh_css_print("\t\t%-32s: %d\n", "FSM Pack src cnt width", state.pack_src_cnt_width); - sh_css_print("FSM Pack dest cnt width : %d\n\t\t", + sh_css_print("\t\t%-32s: %d\n", "FSM Pack dest cnt width", state.pack_dest_cnt_width); - sh_css_print("FSM Read state\n\t\t"); + if (state.read_state == sh_css_dma_rw_state_idle) - sh_css_print("\tIdle state\n\t\t"); + fsm_read_st = "Idle state"; if (state.read_state == sh_css_dma_rw_state_req) - sh_css_print("\tReq state\n\t\t"); + fsm_read_st = "Req state"; if (state.read_state == sh_css_dma_rw_state_next_line) - sh_css_print("\tNext line\n\t\t"); + fsm_read_st = "Next line"; if (state.read_state == sh_css_dma_rw_state_unlock_channel) - sh_css_print("\tUnlock channel\n\t\t"); - sh_css_print("FSM Read cnt height : %d\n\t\t", + fsm_read_st = "Unlock channel"; + + sh_css_print("\t\t%-32s: %s\n", "FSM Read state", fsm_read_st); + + sh_css_print("\t\t%-32s: %d\n", "FSM Read cnt height", state.read_cnt_height); - sh_css_print("FSM Read cnt width : %d\n\t\t", + sh_css_print("\t\t%-32s: %d\n", "FSM Read cnt width", state.read_cnt_width); - sh_css_print("FSM Write state\n\t\t\t"); + if (state.write_state == sh_css_dma_rw_state_idle) - sh_css_print("\tIdle state\n\t\t"); + fsm_write_st = "Idle state"; if (state.write_state == sh_css_dma_rw_state_req) - sh_css_print("\tReq state\n\t\t"); + fsm_write_st = "Req state"; if (state.write_state == sh_css_dma_rw_state_next_line) - sh_css_print("\tNext line\n\t\t"); + fsm_write_st = "Next line"; if (state.write_state == sh_css_dma_rw_state_unlock_channel) - sh_css_print("\tUnlock channel\n\t\t"); - sh_css_print("FSM Write height : %d\n\t\t", + fsm_write_st = "Unlock channel"; + + sh_css_print("\t\t%-32s: %s\n", "FSM Write state", fsm_write_st); + + sh_css_print("\t\t%-32s: %d\n", "FSM Write height", state.write_height); - sh_css_print("FSM Write width : %d\n\t\t", + sh_css_print("\t\t%-32s: %d\n", "FSM Write width", state.write_width); - sh_css_print("\n\t"); + for (i = 0; i < num_ports; i++) { - sh_css_print("DMA device interface %d\n", i); - sh_css_print("\t\tDMA internal side state\n\t\t\t"); - sh_css_print("CS: %d - We_n: %d - Run: %d - Ack: %d\n", + sh_css_print("\tDMA device interface %d\n", i); + sh_css_print("\t\tDMA internal side state\n"); + sh_css_print("\t\t\tCS: %d - We_n: %d - Run: %d - Ack: %d\n", state.port_states[i].req_cs, state.port_states[i].req_we_n, state.port_states[i].req_run, state.port_states[i].req_ack); - sh_css_print("\t\tMaster Output side state\n\t\t\t"); - sh_css_print("CS: %d - We_n: %d - Run: s%d - Ack: %d\n", + sh_css_print("\t\tMaster Output side state\n"); + sh_css_print("\t\t\tCS: %d - We_n: %d - Run: s%d - Ack: %d\n", state.port_states[i].send_cs, state.port_states[i].send_we_n, state.port_states[i].send_run, state.port_states[i].send_ack); - sh_css_print("\t\tFifo state\n\t\t\t"); + sh_css_print("\t\tFifo state\n"); if (state.port_states[i].fifo_state == sh_css_dma_fifo_state_will_be_full) { - sh_css_print("FiFo will be full\n"); - } - if (state.port_states[i].fifo_state == + sh_css_print("\t\t\tFiFo will be full\n"); + } else if (state.port_states[i].fifo_state == sh_css_dma_fifo_state_full) { - sh_css_print("Fifo Full\n"); - } - if (state.port_states[i].fifo_state == + sh_css_print("\t\t\tFifo Full\n"); + } else if (state.port_states[i].fifo_state == sh_css_dma_fifo_state_empty) { - sh_css_print("Fifo Empty\n"); + sh_css_print("\t\t\tFifo Empty\n"); + } else { + sh_css_print("\t\t\tFifo state unknown\n"); } - sh_css_print("\t\tFifo counter %d\n\t", + sh_css_print("\t\tFifo counter %d\n\n", state.port_states[i].fifo_counter); } - sh_css_print("\n\t"); + for (i = 0; i < num_channels; i++) { struct sh_css_dma_channel_state *ch; ch = &(state.channel_states[i]); - sh_css_print("DMA channel register %d\n\t\t", i); - sh_css_print("Connection : %d\n\t\t", ch->connection); - sh_css_print("Sign extend: : %d\n\t\t", ch->sign_extend); - sh_css_print("Reverse elems : %d\n\t\t", + sh_css_print("\t%-32s: %d\n", "DMA channel register", + i); + sh_css_print("\t\t%-32s: %d\n", "Connection", + ch->connection); + sh_css_print("\t\t%-32s: %d\n", "Sign extend", + ch->sign_extend); + sh_css_print("\t\t%-32s: %d\n", "Reverse elems", ch->reverse_elem_order); - sh_css_print("Stride Dev A : 0x%x\n\t\t", ch->stride_a); - sh_css_print("Elems Dev A : %d\n\t\t", ch->elems_a); - sh_css_print("Cropping Dev A : %d\n\t\t", ch->cropping_a); - sh_css_print("Width Dev A : %d\n\t\t", ch->width_a); - sh_css_print("Stride Dev B : 0x%x\n\t\t", ch->stride_b); - sh_css_print("Elems Dev B : %d\n\t\t", ch->elems_b); - sh_css_print("Cropping Dev B : %d\n\t\t", ch->cropping_b); - sh_css_print("Width Dev B : %d\n\t\t", ch->width_b); - sh_css_print("Height : %d\n\t", ch->height); + sh_css_print("\t\t%-32s: 0x%X\n", "Stride Dev A", + ch->stride_a); + sh_css_print("\t\t%-32s: %d\n", "Elems Dev A", + ch->elems_a); + sh_css_print("\t\t%-32s: %d\n", "Cropping Dev A", + ch->cropping_a); + sh_css_print("\t\t%-32s: %d\n", "Width Dev A", + ch->width_a); + sh_css_print("\t\t%-32s: 0x%X\n", "Stride Dev B", + ch->stride_b); + sh_css_print("\t\t%-32s: %d\n", "Elems Dev B", + ch->elems_b); + sh_css_print("\t\t%-32s: %d\n", "Cropping Dev B", + ch->cropping_b); + sh_css_print("\t\t%-32s: %d\n", "Width Dev B", + ch->width_b); + sh_css_print("\t\t%-32s: %d\n", "Height", + ch->height); } sh_css_print("\n"); } @@ -445,10 +558,10 @@ print_fifo_channel_state(struct sh_css_fifo_channel_state *state, const char *descr) { sh_css_print("FIFO channel: %s\n", descr); - sh_css_print(" source valid: %d\n", state->src_valid); - sh_css_print(" fifo accept: %d\n", state->fifo_accept); - sh_css_print(" fifo valid: %d\n", state->fifo_valid); - sh_css_print(" sink accept: %d\n", state->sink_accept); + sh_css_print("\t%-32s: %d\n", "source valid", state->src_valid); + sh_css_print("\t%-32s: %d\n", "fifo accept" , state->fifo_accept); + sh_css_print("\t%-32s: %d\n", "fifo valid" , state->fifo_valid); + sh_css_print("\t%-32s: %d\n", "sink accept" , state->sink_accept); } void @@ -504,22 +617,16 @@ sh_css_dump_isp_sp_fifo_state(void) } void -sh_css_dump_debug_info(void) +sh_css_dump_isp_gdc_fifo_state(void) { - sh_css_dump_rx_state(); - sh_css_dump_if_state(); - /* some of these are commented out because they usually don't offer - anything meaningful. */ - if (0) { - sh_css_dump_isp_state(); - sh_css_dump_isp_sp_fifo_state(); - } - sh_css_dump_sp_state(); - if (0) { - sh_css_dump_dma_isp_fifo_state(); - sh_css_dump_dma_sp_fifo_state(); - sh_css_dump_dma_state(); - } + struct sh_css_fifo_channel_state gdc_to_isp, + isp_to_gdc; + sh_css_hrt_fifo_channel_get_state(sh_css_hrt_fifo_gdc_to_isp, + &gdc_to_isp); + sh_css_hrt_fifo_channel_get_state(sh_css_hrt_fifo_isp_to_gdc, + &isp_to_gdc); + print_fifo_channel_state(&gdc_to_isp, "GDC to ISP"); + print_fifo_channel_state(&isp_to_gdc, "ISP to GDC"); } static void @@ -648,29 +755,49 @@ sh_css_dump_rx_state(void) bits = sh_css_rx_get_interrupt_reg(); sh_css_rx_get_interrupt_info(&infos); - sh_css_print("CSI Receiver errors: (irq reg = 0x%X\n", bits); + sh_css_print("CSI Receiver errors: (irq reg = 0x%X)\n", bits); + if (infos & SH_CSS_RX_IRQ_INFO_BUFFER_OVERRUN) - sh_css_print(" buffer overrun"); + sh_css_print("\tbuffer overrun\n"); if (infos & SH_CSS_RX_IRQ_INFO_ERR_SOT) - sh_css_print(" start-of-transmission error"); + sh_css_print("\tstart-of-transmission error\n"); if (infos & SH_CSS_RX_IRQ_INFO_ERR_SOT_SYNC) - sh_css_print(" start-of-transmission sync error"); + sh_css_print("\tstart-of-transmission sync error\n"); if (infos & SH_CSS_RX_IRQ_INFO_ERR_CONTROL) - sh_css_print(" control error"); + sh_css_print("\tcontrol error\n"); if (infos & SH_CSS_RX_IRQ_INFO_ERR_ECC_DOUBLE) - sh_css_print(" 2 or more ECC errors"); + sh_css_print("\t2 or more ECC errors\n"); if (infos & SH_CSS_RX_IRQ_INFO_ERR_CRC) - sh_css_print(" CRC mismatch"); + sh_css_print("\tCRC mismatch\n"); if (infos & SH_CSS_RX_IRQ_INFO_ERR_UNKNOWN_ID) - sh_css_print(" unknown error"); + sh_css_print("\tunknown error\n"); if (infos & SH_CSS_RX_IRQ_INFO_ERR_FRAME_SYNC) - sh_css_print(" frame sync error"); + sh_css_print("\tframe sync error\n"); if (infos & SH_CSS_RX_IRQ_INFO_ERR_FRAME_DATA) - sh_css_print(" frame data error"); + sh_css_print("\tframe data error\n"); if (infos & SH_CSS_RX_IRQ_INFO_ERR_DATA_TIMEOUT) - sh_css_print(" data timeout"); + sh_css_print("\tdata timeout\n"); if (infos & SH_CSS_RX_IRQ_INFO_ERR_UNKNOWN_ESC) - sh_css_print(" unknown escape command entry"); + sh_css_print("\tunknown escape command entry\n"); if (infos & SH_CSS_RX_IRQ_INFO_ERR_LINE_SYNC) - sh_css_print(" line sync error"); + sh_css_print("\tline sync error\n"); +} + +void +sh_css_dump_debug_info(const char *context) +{ + if (!context) + context = "No Context provided"; + + sh_css_print("CSS Debug Info dump [Context = %s]\n", context); + sh_css_dump_rx_state(); + sh_css_dump_if_state(); + sh_css_dump_isp_state(); + sh_css_dump_isp_sp_fifo_state(); + sh_css_dump_isp_gdc_fifo_state(); + sh_css_dump_sp_state(); + sh_css_dump_dma_isp_fifo_state(); + sh_css_dump_dma_sp_fifo_state(); + sh_css_dump_dma_state(); } + diff --git a/drivers/media/video/atomisp/css/sh_css_debug.h b/drivers/media/video/atomisp/css/sh_css_debug.h index de4bae0..ea45953 100644 --- a/drivers/media/video/atomisp/css/sh_css_debug.h +++ b/drivers/media/video/atomisp/css/sh_css_debug.h @@ -30,7 +30,7 @@ void sh_css_dump_if_state(void); void sh_css_dump_isp_state(void); void sh_css_dump_sp_state(void); void sh_css_dump_dma_state(void); -void sh_css_dump_debug_info(void); +void sh_css_dump_debug_info(const char *context); void sh_css_dump_dma_isp_fifo_state(void); void sh_css_dump_dma_sp_fifo_state(void); void sh_css_dump_pif_isp_fifo_state(void); diff --git a/drivers/media/video/atomisp/css/sh_css_hrt.c b/drivers/media/video/atomisp/css/sh_css_hrt.c index d6c32c4..c09cf07 100644 --- a/drivers/media/video/atomisp/css/sh_css_hrt.c +++ b/drivers/media/video/atomisp/css/sh_css_hrt.c @@ -280,27 +280,27 @@ sh_css_hrt_sp_get_state(struct sh_css_cell_state *state, state->is_sleeping = (sc & (1U << SP_SLEEPING_BIT)) != 0; state->is_stalling = (sc & (1U << SP_STALLING_BIT)) != 0; stall_state->fifo0 = - sp_ctrl_get_bit(SP_FIFO0_SINK_BIT, SP_FIFO0_SINK_REG); + !sp_ctrl_get_bit(SP_FIFO0_SINK_REG, SP_FIFO0_SINK_BIT); stall_state->fifo1 = - sp_ctrl_get_bit(SP_FIFO1_SINK_BIT, SP_FIFO1_SINK_REG); + !sp_ctrl_get_bit(SP_FIFO1_SINK_REG, SP_FIFO1_SINK_BIT); stall_state->fifo2 = - sp_ctrl_get_bit(SP_FIFO2_SINK_BIT, SP_FIFO2_SINK_REG); + !sp_ctrl_get_bit(SP_FIFO2_SINK_REG, SP_FIFO2_SINK_BIT); stall_state->fifo3 = - sp_ctrl_get_bit(SP_FIFO3_SINK_BIT, SP_FIFO3_SINK_REG); + !sp_ctrl_get_bit(SP_FIFO3_SINK_REG, SP_FIFO3_SINK_BIT); stall_state->fifo4 = - sp_ctrl_get_bit(SP_FIFO4_SINK_BIT, SP_FIFO4_SINK_REG); + !sp_ctrl_get_bit(SP_FIFO4_SINK_REG, SP_FIFO4_SINK_BIT); stall_state->fifo5 = - sp_ctrl_get_bit(SP_FIFO5_SINK_BIT, SP_FIFO5_SINK_REG); + !sp_ctrl_get_bit(SP_FIFO5_SINK_REG, SP_FIFO5_SINK_BIT); stall_state->fifo6 = - sp_ctrl_get_bit(SP_FIFO6_SINK_BIT, SP_FIFO6_SINK_REG); + !sp_ctrl_get_bit(SP_FIFO6_SINK_REG, SP_FIFO6_SINK_BIT); stall_state->fifo7 = - sp_ctrl_get_bit(SP_FIFO7_SINK_BIT, SP_FIFO7_SINK_REG); + !sp_ctrl_get_bit(SP_FIFO7_SINK_REG, SP_FIFO7_SINK_BIT); stall_state->dmem = - sp_ctrl_get_bit(SP_DMEM_SINK_BIT, SP_DMEM_SINK_REG); + !sp_ctrl_get_bit(SP_DMEM_SINK_REG, SP_DMEM_SINK_BIT); stall_state->control_master = - sp_ctrl_get_bit(SP_CTRL_MT_SINK_BIT, SP_CTRL_MT_SINK_REG); + !sp_ctrl_get_bit(SP_CTRL_MT_SINK_REG, SP_CTRL_MT_SINK_BIT); stall_state->icache_master = - sp_ctrl_get_bit(SP_ICACHE_MT_SINK_BIT, SP_ICACHE_MT_SINK_REG); + !sp_ctrl_get_bit(SP_ICACHE_MT_SINK_REG, SP_ICACHE_MT_SINK_BIT); } void @@ -316,27 +316,27 @@ sh_css_hrt_isp_get_state(struct sh_css_cell_state *state, state->is_sleeping = isp_ctrl_get_bit(ISP_SC_REG, ISP_SLEEPING_BIT); state->is_stalling = isp_ctrl_get_bit(ISP_SC_REG, ISP_STALLING_BIT); stall_state->stat_ctrl = - isp_ctrl_get_bit(ISP_CTRL_SINK_BIT, ISP_CTRL_SINK_REG); + !isp_ctrl_get_bit(ISP_CTRL_SINK_REG , ISP_CTRL_SINK_BIT); stall_state->dmem = - isp_ctrl_get_bit(ISP_DMEM_SINK_BIT, ISP_DMEM_SINK_REG); + !isp_ctrl_get_bit(ISP_DMEM_SINK_REG , ISP_DMEM_SINK_BIT); stall_state->vmem = - isp_ctrl_get_bit(ISP_VMEM_SINK_BIT, ISP_VMEM_SINK_REG); + !isp_ctrl_get_bit(ISP_VMEM_SINK_REG , ISP_VMEM_SINK_BIT); stall_state->fifo0 = - isp_ctrl_get_bit(ISP_FIFO0_SINK_BIT, ISP_FIFO0_SINK_REG); + !isp_ctrl_get_bit(ISP_FIFO0_SINK_REG , ISP_FIFO0_SINK_BIT); stall_state->fifo1 = - isp_ctrl_get_bit(ISP_FIFO1_SINK_BIT, ISP_FIFO1_SINK_REG); + !isp_ctrl_get_bit(ISP_FIFO1_SINK_REG , ISP_FIFO1_SINK_BIT); stall_state->fifo2 = - isp_ctrl_get_bit(ISP_FIFO2_SINK_BIT, ISP_FIFO2_SINK_REG); + !isp_ctrl_get_bit(ISP_FIFO2_SINK_REG , ISP_FIFO2_SINK_BIT); stall_state->fifo3 = - isp_ctrl_get_bit(ISP_FIFO3_SINK_BIT, ISP_FIFO3_SINK_REG); + !isp_ctrl_get_bit(ISP_FIFO3_SINK_REG , ISP_FIFO3_SINK_BIT); stall_state->fifo4 = - isp_ctrl_get_bit(ISP_FIFO4_SINK_BIT, ISP_FIFO4_SINK_REG); + !isp_ctrl_get_bit(ISP_FIFO4_SINK_REG , ISP_FIFO4_SINK_BIT); stall_state->fifo5 = - isp_ctrl_get_bit(ISP_FIFO5_SINK_BIT, ISP_FIFO5_SINK_REG); + !isp_ctrl_get_bit(ISP_FIFO5_SINK_REG , ISP_FIFO5_SINK_BIT); stall_state->vamem1 = - isp_ctrl_get_bit(ISP_VAMEM1_SINK_BIT, ISP_VAMEM1_SINK_REG); + !isp_ctrl_get_bit(ISP_VAMEM1_SINK_REG, ISP_VAMEM1_SINK_BIT); stall_state->vamem2 = - isp_ctrl_get_bit(ISP_VAMEM2_SINK_BIT, ISP_VAMEM2_SINK_REG); + !isp_ctrl_get_bit(ISP_VAMEM2_SINK_REG, ISP_VAMEM2_SINK_BIT); } static inline unsigned long @@ -1479,6 +1479,26 @@ sh_css_hrt_fifo_channel_get_state(enum sh_css_fifo_channel channel, state->sink_accept = sh_css_get_sp_stream_stat_accept( SP_STR_MON_PORT_RCV_DMA); break; + case sh_css_hrt_fifo_isp_to_gdc: + state->src_valid = sh_css_get_isp_stream_stat_valid( + ISP_STR_MON_PORT_SND_GDC); + state->fifo_accept = sh_css_get_isp_stream_stat_accept( + ISP_STR_MON_PORT_SND_GDC); + state->fifo_valid = sh_css_get_mod_stream_stat_valid( + MOD_STR_MON_PORT_RCV_GDC); + state->sink_accept = sh_css_get_mod_stream_stat_accept( + MOD_STR_MON_PORT_RCV_GDC); + break; + case sh_css_hrt_fifo_gdc_to_isp: + state->fifo_valid = sh_css_get_mod_stream_stat_valid( + MOD_STR_MON_PORT_SND_GDC); + state->sink_accept = sh_css_get_mod_stream_stat_accept( + MOD_STR_MON_PORT_SND_GDC); + state->src_valid = sh_css_get_isp_stream_stat_valid( + ISP_STR_MON_PORT_RCV_GDC); + state->fifo_accept = sh_css_get_isp_stream_stat_accept( + ISP_STR_MON_PORT_RCV_GDC); + break; } } diff --git a/drivers/media/video/atomisp/css/sh_css_hrt.h b/drivers/media/video/atomisp/css/sh_css_hrt.h index 9bd712b..60d668d 100644 --- a/drivers/media/video/atomisp/css/sh_css_hrt.h +++ b/drivers/media/video/atomisp/css/sh_css_hrt.h @@ -61,7 +61,10 @@ enum sh_css_fifo_channel { sh_css_hrt_fifo_dma_to_isp, /* SP <-> DMA */ sh_css_hrt_fifo_sp_to_dma, - sh_css_hrt_fifo_dma_to_sp + sh_css_hrt_fifo_dma_to_sp, + /* ISP <-> GDC */ + sh_css_hrt_fifo_isp_to_gdc, + sh_css_hrt_fifo_gdc_to_isp, }; enum sh_css_dma_ctrl_state { -- 2.7.4