From 396b95e5c9ede161b3634f7c8046188b7da8f387 Mon Sep 17 00:00:00 2001 From: Roman Lebedev Date: Sun, 3 Oct 2021 23:22:58 +0300 Subject: [PATCH] [X86][Costmodel] Load/store i8 Stride=6 VF=2 interleaving costs The only sched models that for cpu's that support avx2 but not avx512 are: haswell, broadwell, skylake, zen1-3 For load we have: https://godbolt.org/z/jvj6jzns5 - for intels `Block RThroughput: =6.0`; for ryzens, `Block RThroughput: <=3.0` So pick cost of `6`. For store we have: https://godbolt.org/z/ros7eebMP - for intels `Block RThroughput: =7.0`; for ryzens, `Block RThroughput: <=3.0` So pick cost of `7`. I'm directly using the shuffling asm the llc produced, without any manual fixups that may be needed to ensure sequential execution. Reviewed By: RKSimon Differential Revision: https://reviews.llvm.org/D111008 --- llvm/lib/Target/X86/X86TargetTransformInfo.cpp | 4 ++++ llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-6.ll | 2 +- llvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-6.ll | 2 +- 3 files changed, 6 insertions(+), 2 deletions(-) diff --git a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp index a0a8ff6..9d4980b 100644 --- a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp +++ b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp @@ -5114,6 +5114,8 @@ InstructionCost X86TTIImpl::getInterleavedMemoryOpCostAVX2( {4, MVT::v16i16, 75}, // (load 64i16 and) deinterleave into 4 x 16i16 {4, MVT::v32i16, 150}, // (load 128i16 and) deinterleave into 4 x 32i16 + {6, MVT::v2i8, 6}, // (load 12i8 and) deinterleave into 6 x 2i8 + {6, MVT::v2i16, 13}, // (load 12i16 and) deinterleave into 6 x 2i16 {6, MVT::v4i16, 9}, // (load 24i16 and) deinterleave into 6 x 4i16 {6, MVT::v8i16, 39}, // (load 48i16 and) deinterleave into 6 x 8i16 @@ -5164,6 +5166,8 @@ InstructionCost X86TTIImpl::getInterleavedMemoryOpCostAVX2( {4, MVT::v16i16, 32}, // interleave 4 x 16i16 into 64i16 (and store) {4, MVT::v32i16, 64}, // interleave 4 x 32i16 into 128i16 (and store) + {6, MVT::v2i8, 7}, // interleave 6 x 2i8 into 12i8 (and store) + {6, MVT::v2i16, 10}, // interleave 6 x 2i16 into 12i16 (and store) {6, MVT::v4i16, 15}, // interleave 6 x 4i16 into 24i16 (and store) {6, MVT::v8i16, 21}, // interleave 6 x 8i16 into 48i16 (and store) diff --git a/llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-6.ll b/llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-6.ll index 2528f87..ca8b9d5 100644 --- a/llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-6.ll +++ b/llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-6.ll @@ -26,7 +26,7 @@ target triple = "x86_64-unknown-linux-gnu" ; AVX1: LV: Found an estimated cost of 498 for VF 32 For instruction: %v0 = load i8, i8* %in0, align 1 ; ; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load i8, i8* %in0, align 1 -; AVX2: LV: Found an estimated cost of 27 for VF 2 For instruction: %v0 = load i8, i8* %in0, align 1 +; AVX2: LV: Found an estimated cost of 9 for VF 2 For instruction: %v0 = load i8, i8* %in0, align 1 ; AVX2: LV: Found an estimated cost of 59 for VF 4 For instruction: %v0 = load i8, i8* %in0, align 1 ; AVX2: LV: Found an estimated cost of 114 for VF 8 For instruction: %v0 = load i8, i8* %in0, align 1 ; AVX2: LV: Found an estimated cost of 243 for VF 16 For instruction: %v0 = load i8, i8* %in0, align 1 diff --git a/llvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-6.ll b/llvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-6.ll index b6793e7..1423fd8 100644 --- a/llvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-6.ll +++ b/llvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-6.ll @@ -26,7 +26,7 @@ target triple = "x86_64-unknown-linux-gnu" ; AVX1: LV: Found an estimated cost of 498 for VF 32 For instruction: store i8 %v5, i8* %out5, align 1 ; ; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: store i8 %v5, i8* %out5, align 1 -; AVX2: LV: Found an estimated cost of 27 for VF 2 For instruction: store i8 %v5, i8* %out5, align 1 +; AVX2: LV: Found an estimated cost of 10 for VF 2 For instruction: store i8 %v5, i8* %out5, align 1 ; AVX2: LV: Found an estimated cost of 54 for VF 4 For instruction: store i8 %v5, i8* %out5, align 1 ; AVX2: LV: Found an estimated cost of 101 for VF 8 For instruction: store i8 %v5, i8* %out5, align 1 ; AVX2: LV: Found an estimated cost of 201 for VF 16 For instruction: store i8 %v5, i8* %out5, align 1 -- 2.7.4