From 37a32f3c96f0fcc5a3e4344b23b6ffffd266ed30 Mon Sep 17 00:00:00 2001 From: Simon Pilgrim Date: Sat, 27 Jul 2019 18:44:15 +0000 Subject: [PATCH] Regenerate UXTB tests llvm-svn: 367179 --- llvm/test/CodeGen/ARM/uxtb.ll | 75 +++++++++------ llvm/test/CodeGen/Thumb2/thumb2-uxtb.ll | 163 ++++++++++++++++++++++---------- 2 files changed, 157 insertions(+), 81 deletions(-) diff --git a/llvm/test/CodeGen/ARM/uxtb.ll b/llvm/test/CodeGen/ARM/uxtb.ll index 28d951c..b9caa87 100644 --- a/llvm/test/CodeGen/ARM/uxtb.ll +++ b/llvm/test/CodeGen/ARM/uxtb.ll @@ -1,50 +1,59 @@ ; RUN: llc -mtriple armv6-apple-darwin -filetype asm -o - %s | FileCheck %s define i32 @test1(i32 %x) { +; CHECK-LABEL: test1: +; CHECK: @ %bb.0: +; CHECK-NEXT: uxtb16 r0, r0 +; CHECK-NEXT: bx lr %tmp1 = and i32 %x, 16711935 ret i32 %tmp1 } -; CHECK-LABEL: test1: -; CHECK: uxt - define i32 @test2(i32 %x) { +; CHECK-LABEL: test2: +; CHECK: @ %bb.0: +; CHECK-NEXT: uxtb16 r0, r0, ror #8 +; CHECK-NEXT: bx lr %tmp1 = lshr i32 %x, 8 %tmp2 = and i32 %tmp1, 16711935 ret i32 %tmp2 } -; CHECK-LABEL: test2: -; CHECK: uxt - define i32 @test3(i32 %x) { +; CHECK-LABEL: test3: +; CHECK: @ %bb.0: +; CHECK-NEXT: uxtb16 r0, r0, ror #8 +; CHECK-NEXT: bx lr %tmp1 = lshr i32 %x, 8 %tmp2 = and i32 %tmp1, 16711935 ret i32 %tmp2 } -; CHECK-LABEL: test3: -; CHECK: uxt - define i32 @test4(i32 %x) { +; CHECK-LABEL: test4: +; CHECK: @ %bb.0: +; CHECK-NEXT: uxtb16 r0, r0, ror #8 +; CHECK-NEXT: bx lr %tmp1 = lshr i32 %x, 8 %tmp6 = and i32 %tmp1, 16711935 ret i32 %tmp6 } -; CHECK-LABEL: test4: -; CHECK: uxt - define i32 @test5(i32 %x) { +; CHECK-LABEL: test5: +; CHECK: @ %bb.0: +; CHECK-NEXT: uxtb16 r0, r0, ror #8 +; CHECK-NEXT: bx lr %tmp1 = lshr i32 %x, 8 %tmp2 = and i32 %tmp1, 16711935 ret i32 %tmp2 } -; CHECK-LABEL: test5: -; CHECK: uxt - define i32 @test6(i32 %x) { +; CHECK-LABEL: test6: +; CHECK: @ %bb.0: +; CHECK-NEXT: uxtb16 r0, r0, ror #16 +; CHECK-NEXT: bx lr %tmp1 = lshr i32 %x, 16 %tmp2 = and i32 %tmp1, 255 %tmp4 = shl i32 %x, 16 @@ -53,10 +62,11 @@ define i32 @test6(i32 %x) { ret i32 %tmp6 } -; CHECK-LABEL: test6: -; CHECK: uxt - define i32 @test7(i32 %x) { +; CHECK-LABEL: test7: +; CHECK: @ %bb.0: +; CHECK-NEXT: uxtb16 r0, r0, ror #16 +; CHECK-NEXT: bx lr %tmp1 = lshr i32 %x, 16 %tmp2 = and i32 %tmp1, 255 %tmp4 = shl i32 %x, 16 @@ -65,10 +75,11 @@ define i32 @test7(i32 %x) { ret i32 %tmp6 } -; CHECK-LABEL: test7: -; CHECK: uxt - define i32 @test8(i32 %x) { +; CHECK-LABEL: test8: +; CHECK: @ %bb.0: +; CHECK-NEXT: uxtb16 r0, r0, ror #24 +; CHECK-NEXT: bx lr %tmp1 = shl i32 %x, 8 %tmp2 = and i32 %tmp1, 16711680 %tmp5 = lshr i32 %x, 24 @@ -76,10 +87,11 @@ define i32 @test8(i32 %x) { ret i32 %tmp6 } -; CHECK-LABEL: test8: -; CHECK: uxt - define i32 @test9(i32 %x) { +; CHECK-LABEL: test9: +; CHECK: @ %bb.0: +; CHECK-NEXT: uxtb16 r0, r0, ror #24 +; CHECK-NEXT: bx lr %tmp1 = lshr i32 %x, 24 %tmp4 = shl i32 %x, 8 %tmp5 = and i32 %tmp4, 16711680 @@ -87,10 +99,16 @@ define i32 @test9(i32 %x) { ret i32 %tmp6 } -; CHECK-LABEL: test9: -; CHECK: uxt - define i32 @test10(i32 %p0) { +; CHECK-LABEL: test10: +; CHECK: @ %bb.0: +; CHECK-NEXT: mov r1, #248 +; CHECK-NEXT: orr r1, r1, #16252928 +; CHECK-NEXT: and r0, r1, r0, lsr #7 +; CHECK-NEXT: lsr r1, r0, #5 +; CHECK-NEXT: uxtb16 r1, r1 +; CHECK-NEXT: orr r0, r1, r0 +; CHECK-NEXT: bx lr %tmp1 = lshr i32 %p0, 7 %tmp2 = and i32 %tmp1, 16253176 %tmp4 = lshr i32 %tmp2, 5 @@ -99,6 +117,3 @@ define i32 @test10(i32 %p0) { ret i32 %tmp7 } -; CHECK-LABEL: test10: -; CHECK: uxt - diff --git a/llvm/test/CodeGen/Thumb2/thumb2-uxtb.ll b/llvm/test/CodeGen/Thumb2/thumb2-uxtb.ll index 8f6d556..5d2456b 100644 --- a/llvm/test/CodeGen/Thumb2/thumb2-uxtb.ll +++ b/llvm/test/CodeGen/Thumb2/thumb2-uxtb.ll @@ -1,63 +1,100 @@ -; RUN: llc -mtriple=thumb-eabi -mcpu=cortex-a8 %s -o - | FileCheck %s -check-prefix=CHECK-DSP -; RUN: llc -mtriple=thumb-eabi -mcpu=cortex-m3 %s -o - | FileCheck %s -check-prefix=CHECK-NO-DSP -; RUN: llc -mtriple=thumbv7em-eabi %s -o - | FileCheck %s -check-prefix=CHECK-DSP -; RUN: llc -mtriple=thumbv8m.main-none-eabi %s -o - | FileCheck %s -check-prefix=CHECK-NO-DSP -; RUN: llc -mtriple=thumbv8m.main-none-eabi -mattr=+dsp %s -o - | FileCheck %s -check-prefix=CHECK-DSP +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -mtriple=thumb-eabi -mcpu=cortex-a8 %s -o - | FileCheck %s -check-prefixes=CHECK,CHECK-DSP +; RUN: llc -mtriple=thumb-eabi -mcpu=cortex-m3 %s -o - | FileCheck %s -check-prefixes=CHECK,CHECK-NO-DSP +; RUN: llc -mtriple=thumbv7em-eabi %s -o - | FileCheck %s -check-prefixes=CHECK,CHECK-DSP +; RUN: llc -mtriple=thumbv8m.main-none-eabi %s -o - | FileCheck %s -check-prefixes=CHECK,CHECK-NO-DSP +; RUN: llc -mtriple=thumbv8m.main-none-eabi -mattr=+dsp %s -o - | FileCheck %s -check-prefixes=CHECK,CHECK-DSP define i32 @test1(i32 %x) { -; CHECK-LABEL: test1 -; CHECK-DSP: uxtb16 r0, r0 -; CHECK-NO-DSP: bic r0, r0, #-16711936 +; CHECK-DSP-LABEL: test1: +; CHECK-DSP: @ %bb.0: +; CHECK-DSP-NEXT: uxtb16 r0, r0 +; CHECK-DSP-NEXT: bx lr +; +; CHECK-NO-DSP-LABEL: test1: +; CHECK-NO-DSP: @ %bb.0: +; CHECK-NO-DSP-NEXT: bic r0, r0, #-16711936 +; CHECK-NO-DSP-NEXT: bx lr %tmp1 = and i32 %x, 16711935 ; [#uses=1] ret i32 %tmp1 } ; PR7503 define i32 @test2(i32 %x) { -; CHECK-LABEL: test2 -; CHECK-DSP: uxtb16 r0, r0, ror #8 -; CHECK-NO-DSP: mov.w r1, #16711935 -; CHECK-NO-DSP: and.w r0, r1, r0, lsr #8 +; CHECK-DSP-LABEL: test2: +; CHECK-DSP: @ %bb.0: +; CHECK-DSP-NEXT: uxtb16 r0, r0, ror #8 +; CHECK-DSP-NEXT: bx lr +; +; CHECK-NO-DSP-LABEL: test2: +; CHECK-NO-DSP: @ %bb.0: +; CHECK-NO-DSP-NEXT: mov.w r1, #16711935 +; CHECK-NO-DSP-NEXT: and.w r0, r1, r0, lsr #8 +; CHECK-NO-DSP-NEXT: bx lr %tmp1 = lshr i32 %x, 8 ; [#uses=1] %tmp2 = and i32 %tmp1, 16711935 ; [#uses=1] ret i32 %tmp2 } define i32 @test3(i32 %x) { -; CHECK-LABEL: test3 -; CHECK-DSP: uxtb16 r0, r0, ror #8 -; CHECK-NO-DSP: mov.w r1, #16711935 -; CHECK-NO-DSP: and.w r0, r1, r0, lsr #8 +; CHECK-DSP-LABEL: test3: +; CHECK-DSP: @ %bb.0: +; CHECK-DSP-NEXT: uxtb16 r0, r0, ror #8 +; CHECK-DSP-NEXT: bx lr +; +; CHECK-NO-DSP-LABEL: test3: +; CHECK-NO-DSP: @ %bb.0: +; CHECK-NO-DSP-NEXT: mov.w r1, #16711935 +; CHECK-NO-DSP-NEXT: and.w r0, r1, r0, lsr #8 +; CHECK-NO-DSP-NEXT: bx lr %tmp1 = lshr i32 %x, 8 ; [#uses=1] %tmp2 = and i32 %tmp1, 16711935 ; [#uses=1] ret i32 %tmp2 } define i32 @test4(i32 %x) { -; CHECK-LABEL: test4 -; CHECK-DSP: uxtb16 r0, r0, ror #8 -; CHECK-NO-DSP: mov.w r1, #16711935 -; CHECK-NO-DSP: and.w r0, r1, r0, lsr #8 +; CHECK-DSP-LABEL: test4: +; CHECK-DSP: @ %bb.0: +; CHECK-DSP-NEXT: uxtb16 r0, r0, ror #8 +; CHECK-DSP-NEXT: bx lr +; +; CHECK-NO-DSP-LABEL: test4: +; CHECK-NO-DSP: @ %bb.0: +; CHECK-NO-DSP-NEXT: mov.w r1, #16711935 +; CHECK-NO-DSP-NEXT: and.w r0, r1, r0, lsr #8 +; CHECK-NO-DSP-NEXT: bx lr %tmp1 = lshr i32 %x, 8 ; [#uses=1] %tmp6 = and i32 %tmp1, 16711935 ; [#uses=1] ret i32 %tmp6 } define i32 @test5(i32 %x) { -; CHECK-LABEL: test5 -; CHECK-DSP: uxtb16 r0, r0, ror #8 -; CHECK-NO-DSP: mov.w r1, #16711935 -; CHECK-NO-DSP: and.w r0, r1, r0, lsr #8 +; CHECK-DSP-LABEL: test5: +; CHECK-DSP: @ %bb.0: +; CHECK-DSP-NEXT: uxtb16 r0, r0, ror #8 +; CHECK-DSP-NEXT: bx lr +; +; CHECK-NO-DSP-LABEL: test5: +; CHECK-NO-DSP: @ %bb.0: +; CHECK-NO-DSP-NEXT: mov.w r1, #16711935 +; CHECK-NO-DSP-NEXT: and.w r0, r1, r0, lsr #8 +; CHECK-NO-DSP-NEXT: bx lr %tmp1 = lshr i32 %x, 8 ; [#uses=1] %tmp2 = and i32 %tmp1, 16711935 ; [#uses=1] ret i32 %tmp2 } define i32 @test6(i32 %x) { -; CHECK-LABEL: test6 -; CHECK-DSP: uxtb16 r0, r0, ror #16 -; CHECK-NO-DSP: mov.w r1, #16711935 -; CHECK-NO-DSP: and.w r0, r1, r0, ror #16 +; CHECK-DSP-LABEL: test6: +; CHECK-DSP: @ %bb.0: +; CHECK-DSP-NEXT: uxtb16 r0, r0, ror #16 +; CHECK-DSP-NEXT: bx lr +; +; CHECK-NO-DSP-LABEL: test6: +; CHECK-NO-DSP: @ %bb.0: +; CHECK-NO-DSP-NEXT: mov.w r1, #16711935 +; CHECK-NO-DSP-NEXT: and.w r0, r1, r0, ror #16 +; CHECK-NO-DSP-NEXT: bx lr %tmp1 = lshr i32 %x, 16 ; [#uses=1] %tmp2 = and i32 %tmp1, 255 ; [#uses=1] %tmp4 = shl i32 %x, 16 ; [#uses=1] @@ -67,10 +104,16 @@ define i32 @test6(i32 %x) { } define i32 @test7(i32 %x) { -; CHECK-LABEL: test7 -; CHECK-DSP: uxtb16 r0, r0, ror #16 -; CHECK-NO-DSP: mov.w r1, #16711935 -; CHECK-NO-DSP: and.w r0, r1, r0, ror #16 +; CHECK-DSP-LABEL: test7: +; CHECK-DSP: @ %bb.0: +; CHECK-DSP-NEXT: uxtb16 r0, r0, ror #16 +; CHECK-DSP-NEXT: bx lr +; +; CHECK-NO-DSP-LABEL: test7: +; CHECK-NO-DSP: @ %bb.0: +; CHECK-NO-DSP-NEXT: mov.w r1, #16711935 +; CHECK-NO-DSP-NEXT: and.w r0, r1, r0, ror #16 +; CHECK-NO-DSP-NEXT: bx lr %tmp1 = lshr i32 %x, 16 ; [#uses=1] %tmp2 = and i32 %tmp1, 255 ; [#uses=1] %tmp4 = shl i32 %x, 16 ; [#uses=1] @@ -80,10 +123,16 @@ define i32 @test7(i32 %x) { } define i32 @test8(i32 %x) { -; CHECK-LABEL: test8 -; CHECK-DSP: uxtb16 r0, r0, ror #24 -; CHECK-NO-DSP: mov.w r1, #16711935 -; CHECK-NO-DSP: and.w r0, r1, r0, ror #24 +; CHECK-DSP-LABEL: test8: +; CHECK-DSP: @ %bb.0: +; CHECK-DSP-NEXT: uxtb16 r0, r0, ror #24 +; CHECK-DSP-NEXT: bx lr +; +; CHECK-NO-DSP-LABEL: test8: +; CHECK-NO-DSP: @ %bb.0: +; CHECK-NO-DSP-NEXT: mov.w r1, #16711935 +; CHECK-NO-DSP-NEXT: and.w r0, r1, r0, ror #24 +; CHECK-NO-DSP-NEXT: bx lr %tmp1 = shl i32 %x, 8 ; [#uses=1] %tmp2 = and i32 %tmp1, 16711680 ; [#uses=1] %tmp5 = lshr i32 %x, 24 ; [#uses=1] @@ -92,10 +141,16 @@ define i32 @test8(i32 %x) { } define i32 @test9(i32 %x) { -; CHECK-LABEL: test9 -; CHECK-DSP: uxtb16 r0, r0, ror #24 -; CHECK-NO-DSP: mov.w r1, #16711935 -; CHECK-NO-DSP: and.w r0, r1, r0, ror #24 +; CHECK-DSP-LABEL: test9: +; CHECK-DSP: @ %bb.0: +; CHECK-DSP-NEXT: uxtb16 r0, r0, ror #24 +; CHECK-DSP-NEXT: bx lr +; +; CHECK-NO-DSP-LABEL: test9: +; CHECK-NO-DSP: @ %bb.0: +; CHECK-NO-DSP-NEXT: mov.w r1, #16711935 +; CHECK-NO-DSP-NEXT: and.w r0, r1, r0, ror #24 +; CHECK-NO-DSP-NEXT: bx lr %tmp1 = lshr i32 %x, 24 ; [#uses=1] %tmp4 = shl i32 %x, 8 ; [#uses=1] %tmp5 = and i32 %tmp4, 16711680 ; [#uses=1] @@ -104,18 +159,24 @@ define i32 @test9(i32 %x) { } define i32 @test10(i32 %p0) { -; CHECK-LABEL: test10 -; CHECK-DSP: mov.w r1, #16253176 -; CHECK-DSP: and.w r0, r1, r0, lsr #7 -; CHECK-DSP: lsrs r1, r0, #5 -; CHECK-DSP: uxtb16 r1, r1 -; CHECk-DSP: adds r0, r1 +; CHECK-DSP-LABEL: test10: +; CHECK-DSP: @ %bb.0: +; CHECK-DSP-NEXT: mov.w r1, #16253176 +; CHECK-DSP-NEXT: and.w r0, r1, r0, lsr #7 +; CHECK-DSP-NEXT: lsrs r1, r0, #5 +; CHECK-DSP-NEXT: uxtb16 r1, r1 +; CHECK-DSP-NEXT: add r0, r1 +; CHECK-DSP-NEXT: bx lr +; +; CHECK-NO-DSP-LABEL: test10: +; CHECK-NO-DSP: @ %bb.0: +; CHECK-NO-DSP-NEXT: mov.w r1, #16253176 +; CHECK-NO-DSP-NEXT: and.w r0, r1, r0, lsr #7 +; CHECK-NO-DSP-NEXT: mov.w r1, #458759 +; CHECK-NO-DSP-NEXT: and.w r1, r1, r0, lsr #5 +; CHECK-NO-DSP-NEXT: add r0, r1 +; CHECK-NO-DSP-NEXT: bx lr -; CHECK-NO-DSP: mov.w r1, #16253176 -; CHECK-NO-DSP: and.w r0, r1, r0, lsr #7 -; CHECK-NO-DSP: mov.w r1, #458759 -; CHECK-NO-DSP: and.w r1, r1, r0, lsr #5 -; CHECK-NO-DSP: add r0, r1 %tmp1 = lshr i32 %p0, 7 ; [#uses=1] %tmp2 = and i32 %tmp1, 16253176 ; [#uses=2] %tmp4 = lshr i32 %tmp2, 5 ; [#uses=1] -- 2.7.4