From 3681c772cf47565e2666d570c6f136dfb405e215 Mon Sep 17 00:00:00 2001 From: Ahmed Bougacha Date: Tue, 2 Aug 2016 16:17:15 +0000 Subject: [PATCH] [GlobalISel] Verify RegBankSelected MF property. RegBankSelected functions shouldn't have any generic virtual register not assigned to a bank. Verify that. llvm-svn: 277476 --- llvm/lib/CodeGen/MachineVerifier.cpp | 18 +++++++++++++++++- .../AArch64/GlobalISel/verify-regbankselected.mir | 21 +++++++++++++++++++++ 2 files changed, 38 insertions(+), 1 deletion(-) create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/verify-regbankselected.mir diff --git a/llvm/lib/CodeGen/MachineVerifier.cpp b/llvm/lib/CodeGen/MachineVerifier.cpp index 8c45ce2..9161cda 100644 --- a/llvm/lib/CodeGen/MachineVerifier.cpp +++ b/llvm/lib/CodeGen/MachineVerifier.cpp @@ -70,6 +70,9 @@ namespace { unsigned foundErrors; + // Avoid querying the MachineFunctionProperties for each operand. + bool isFunctionRegBankSelected; + typedef SmallVector RegVector; typedef SmallVector RegMaskVector; typedef DenseSet RegSet; @@ -330,6 +333,9 @@ unsigned MachineVerifier::verify(MachineFunction &MF) { TRI = MF.getSubtarget().getRegisterInfo(); MRI = &MF.getRegInfo(); + isFunctionRegBankSelected = MF.getProperties().hasProperty( + MachineFunctionProperties::Property::RegBankSelected); + LiveVars = nullptr; LiveInts = nullptr; LiveStks = nullptr; @@ -1003,8 +1009,18 @@ MachineVerifier::visitMachineOperand(const MachineOperand *MO, unsigned MONum) { report("Generic virtual register must have a size", MO, MONum); return; } - // Make sure the register fits into its register bank if any. + const RegisterBank *RegBank = MRI->getRegBankOrNull(Reg); + + // If we're post-RegBankSelect, the gvreg must have a bank. + if (!RegBank && isFunctionRegBankSelected) { + report("Generic virtual register must have a bank in a " + "RegBankSelected function", + MO, MONum); + return; + } + + // Make sure the register fits into its register bank if any. if (RegBank && RegBank->getSize() < Size) { report("Register bank is too small for virtual register", MO, MONum); diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/verify-regbankselected.mir b/llvm/test/CodeGen/AArch64/GlobalISel/verify-regbankselected.mir new file mode 100644 index 0000000..99a3fab --- /dev/null +++ b/llvm/test/CodeGen/AArch64/GlobalISel/verify-regbankselected.mir @@ -0,0 +1,21 @@ +# RUN: not llc -mtriple aarch64-- -verify-machineinstrs -run-pass none -o /dev/null %s 2>&1 | FileCheck %s + +--- | + + define void @test() { ret void } + +... +--- +# CHECK: *** Bad machine code: Generic virtual register must have a bank in a RegBankSelected function *** +# CHECK: instruction: %vreg0(64) = COPY +# CHECK: operand 0: %vreg0 +name: test +isSSA: true +regBankSelected: true +registers: + - { id: 0, class: _ } +body: | + bb.0: + liveins: %x0 + %0(64) = COPY %x0 +... -- 2.7.4