From 362ac1ee46ec9a96a541cf5e300c6f3ea0fcaecf Mon Sep 17 00:00:00 2001 From: Kyungmin Park Date: Mon, 27 Jul 2009 13:43:29 +0900 Subject: [PATCH] s5pc100: Use S5PC1XX for common prefix Signed-off-by: Kyungmin Park --- include/asm-arm/arch-s5pc1xx/cpu.h | 14 +++++--------- include/asm-arm/arch-s5pc1xx/interrupt.h | 9 --------- include/asm-arm/arch-s5pc1xx/mem.h | 3 --- 3 files changed, 5 insertions(+), 21 deletions(-) diff --git a/include/asm-arm/arch-s5pc1xx/cpu.h b/include/asm-arm/arch-s5pc1xx/cpu.h index 89c87a3..0f8fa3f 100644 --- a/include/asm-arm/arch-s5pc1xx/cpu.h +++ b/include/asm-arm/arch-s5pc1xx/cpu.h @@ -26,16 +26,12 @@ #include -#define S5P_ADDR_BASE 0xe0000000 -#define S5P_ADDR(x) (S5P_ADDR_BASE + (x)) +#define S5PC1XX_ADDR_BASE 0xe0000000 +#define S5P_ADDR(x) (S5PC1XX_ADDR_BASE + (x)) -#define S5P_PA_ID S5P_ADDR(0x00000000) /* Chip ID Base */ #define S5P_PA_CLK S5P_ADDR(0x00100000) /* Clock Base */ #define S5P_PA_PWR S5P_ADDR(0x00108000) /* Power Base */ #define S5P_PA_CLK_OTHERS S5P_ADDR(0x00200000) /* Clock Others Base */ -#define S5P_PA_VIC0 S5P_ADDR(0x04000000) /* Vector Interrupt Controller 0 */ -#define S5P_PA_VIC1 S5P_ADDR(0x04100000) /* Vector Interrupt Controller 1 */ -#define S5P_PA_VIC2 S5P_ADDR(0x04200000) /* Vector Interrupt Controller 2 */ /* Note that write the macro by address order */ #define S5PC100_VIC0_BASE 0xE4000000 @@ -54,9 +50,9 @@ /* * Chip ID */ -#define S5P_ID(x) (S5P_PA_ID + (x)) -#define S5PC1XX_PRO_ID S5P_ID(0) -#define S5PC1XX_OMR S5P_ID(4) +#define S5PC1XX_CHIP_ID(x) (0xE0000000 + (x)) +#define S5PC1XX_PRO_ID S5PC1XX_CHIP_ID(0) +#define S5PC1XX_OMR S5PC1XX_CHIP_ID(4) #ifndef __ASSEMBLY__ /* CPU detection macros */ diff --git a/include/asm-arm/arch-s5pc1xx/interrupt.h b/include/asm-arm/arch-s5pc1xx/interrupt.h index 62c5206..44d6f0f 100644 --- a/include/asm-arm/arch-s5pc1xx/interrupt.h +++ b/include/asm-arm/arch-s5pc1xx/interrupt.h @@ -24,15 +24,6 @@ #ifndef __ASM_ARM_ARCH_INTERRUPT_H_ #define __ASM_ARM_ARCH_INTERRUPT_H_ -/* - * Vector Interrupt Controller - * : VIC0, VIC1, VIC2 - */ -/* VIC0 */ -#define S5P_VIC0_BASE(x) (S5P_PA_VIC0 + (x)) -#define S5P_VIC1_BASE(x) (S5P_PA_VIC1 + (x)) -#define S5P_VIC2_BASE(x) (S5P_PA_VIC2 + (x)) - /* Vector Interrupt Offset */ #define VIC_IRQSTATUS_OFFSET 0x0 #define VIC_FIQSTATUS_OFFSET 0x4 diff --git a/include/asm-arm/arch-s5pc1xx/mem.h b/include/asm-arm/arch-s5pc1xx/mem.h index e4c7cb4..3271c91 100644 --- a/include/asm-arm/arch-s5pc1xx/mem.h +++ b/include/asm-arm/arch-s5pc1xx/mem.h @@ -57,7 +57,4 @@ #define PHYTEST0_OFFSET 0x58 #define PHYTEST1_OFFSET 0x5c -/* SROMC Base */ -#define S5PC100_SROMC_BASE 0xE7000000 - #endif -- 2.7.4