From 35fe07916aeae037c6e90ca9c384349c390bead4 Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Wed, 10 Apr 2019 17:27:29 +0000 Subject: [PATCH] [AArch64] Teach getTestBitOperand to look through ANY_EXTENDS This patch teach getTestBitOperand to look through ANY_EXTENDs when the extended bits aren't used. The test case changed here is based what D60358 did to test16 in tbz-tbnz.ll. So this patch will avoid that regression. Differential Revision: https://reviews.llvm.org/D60482 llvm-svn: 358108 --- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 6 ++++++ llvm/test/CodeGen/AArch64/tbz-tbnz.ll | 15 ++++++++++----- 2 files changed, 16 insertions(+), 5 deletions(-) diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp index 84a66a2..f97fc40 100644 --- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp +++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp @@ -11038,6 +11038,12 @@ static SDValue getTestBitOperand(SDValue Op, unsigned &Bit, bool &Invert, return getTestBitOperand(Op->getOperand(0), Bit, Invert, DAG); } + // (tbz (any_ext x), b) -> (tbz x, b) if we don't use the extended bits. + if (Op->getOpcode() == ISD::ANY_EXTEND && + Bit < Op->getOperand(0).getValueSizeInBits()) { + return getTestBitOperand(Op->getOperand(0), Bit, Invert, DAG); + } + if (Op->getNumOperands() != 2) return Op; diff --git a/llvm/test/CodeGen/AArch64/tbz-tbnz.ll b/llvm/test/CodeGen/AArch64/tbz-tbnz.ll index fa79250..5d6b390 100644 --- a/llvm/test/CodeGen/AArch64/tbz-tbnz.ll +++ b/llvm/test/CodeGen/AArch64/tbz-tbnz.ll @@ -360,17 +360,22 @@ end: ret void } -define void @test20(i32 %in) { -; CHECK-LABEL: @test20 +define void @test20(i32 %in) nounwind { +; CHECK-LABEL: test20: +; CHECK: // %bb.0: +; CHECK-NEXT: tbnz w0, #2, .LBB19_2 +; CHECK-NEXT: // %bb.1: // %then +; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill +; CHECK-NEXT: bl t +; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload +; CHECK-NEXT: .LBB19_2: // %end +; CHECK-NEXT: ret %shl = shl i32 %in, 3 %zext = zext i32 %shl to i64 %and = and i64 %zext, 32 %cond = icmp eq i64 %and, 0 br i1 %cond, label %then, label %end -; FIXME: Should be no lsl -; CHECK: lsl w8, w0, #3 -; CHECK: tbnz w8, #5 then: call void @t() -- 2.7.4