From 35b62e033cecf4a328914672e0c769c1341a0c21 Mon Sep 17 00:00:00 2001 From: Florian Hahn Date: Wed, 5 Apr 2023 14:49:12 +0100 Subject: [PATCH] [AArch64] Add cost-model tests for fshr. --- llvm/test/Analysis/CostModel/AArch64/fshr.ll | 236 +++++++++++++++++++++++++++ 1 file changed, 236 insertions(+) create mode 100644 llvm/test/Analysis/CostModel/AArch64/fshr.ll diff --git a/llvm/test/Analysis/CostModel/AArch64/fshr.ll b/llvm/test/Analysis/CostModel/AArch64/fshr.ll new file mode 100644 index 0000000..aacee54 --- /dev/null +++ b/llvm/test/Analysis/CostModel/AArch64/fshr.ll @@ -0,0 +1,236 @@ +; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py UTC_ARGS: --version 2 +; RUN: opt -passes="print" -disable-output -mtriple=arm64-apple-ios < %s 2>&1 | FileCheck %s + +target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128" + +define i8 @fshr_i8_3rd_arg_const(i8 %a, i8 %b) { +; CHECK-LABEL: 'fshr_i8_3rd_arg_const' +; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %fshr = tail call i8 @llvm.fshr.i8(i8 %a, i8 %b, i8 9) +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i8 %fshr +; +entry: + %fshr = tail call i8 @llvm.fshr.i8(i8 %a, i8 %b, i8 9) + ret i8 %fshr +} + +define i8 @fshr_i8_3rd_arg_var(i8 %a, i8 %b, i8 %c) { +; CHECK-LABEL: 'fshr_i8_3rd_arg_var' +; CHECK-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %fshr = tail call i8 @llvm.fshr.i8(i8 %a, i8 %b, i8 %c) +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i8 %fshr +; +entry: + %fshr = tail call i8 @llvm.fshr.i8(i8 %a, i8 %b, i8 %c) + ret i8 %fshr +} + +declare i8 @llvm.fshr.i8(i8, i8, i8) + +define i16 @fshr_i16(i16 %a, i16 %b) { +; CHECK-LABEL: 'fshr_i16' +; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %fshr = tail call i16 @llvm.fshr.i16(i16 %a, i16 %b, i16 9) +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i16 %fshr +; +entry: + %fshr = tail call i16 @llvm.fshr.i16(i16 %a, i16 %b, i16 9) + ret i16 %fshr +} + +declare i16 @llvm.fshr.i16(i16, i16, i16) + +define i32 @fshr_i32_3rd_arg_const(i32 %a, i32 %b) { +; CHECK-LABEL: 'fshr_i32_3rd_arg_const' +; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %fshr = tail call i32 @llvm.fshr.i32(i32 %a, i32 %b, i32 9) +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 %fshr +; +entry: + %fshr = tail call i32 @llvm.fshr.i32(i32 %a, i32 %b, i32 9) + ret i32 %fshr +} + +define i32 @fshr_i32_3rd_arg_var(i32 %a, i32 %b, i32 %c) { +; CHECK-LABEL: 'fshr_i32_3rd_arg_var' +; CHECK-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %fshr = tail call i32 @llvm.fshr.i32(i32 %a, i32 %b, i32 %c) +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 %fshr +; +entry: + %fshr = tail call i32 @llvm.fshr.i32(i32 %a, i32 %b, i32 %c) + ret i32 %fshr +} + +declare i32 @llvm.fshr.i32(i32, i32, i32) + +define i64 @fshr_i64_3rd_arg_const(i64 %a, i64 %b) { +; CHECK-LABEL: 'fshr_i64_3rd_arg_const' +; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %fshr = tail call i64 @llvm.fshr.i64(i64 %a, i64 %b, i64 9) +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i64 %fshr +; +entry: + %fshr = tail call i64 @llvm.fshr.i64(i64 %a, i64 %b, i64 9) + ret i64 %fshr +} + +define i64 @fshr_i64_3rd_arg_var(i64 %a, i64 %b, i64 %c) { +; CHECK-LABEL: 'fshr_i64_3rd_arg_var' +; CHECK-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %fshr = tail call i64 @llvm.fshr.i64(i64 %a, i64 %b, i64 %c) +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i64 %fshr +; +entry: + %fshr = tail call i64 @llvm.fshr.i64(i64 %a, i64 %b, i64 %c) + ret i64 %fshr +} + +declare i64 @llvm.fshr.i64(i64, i64, i64) + +define i19 @fshr_i19(i19 %a, i19 %b) { +; CHECK-LABEL: 'fshr_i19' +; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %fshr = tail call i19 @llvm.fshr.i19(i19 %a, i19 %b, i19 9) +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i19 %fshr +; +entry: + %fshr = tail call i19 @llvm.fshr.i19(i19 %a, i19 %b, i19 9) + ret i19 %fshr +} + +declare i19 @llvm.fshr.i19(i19, i19, i19) + + +define <16 x i8> @fshr_v16i8_3rd_arg_vec_const_all_lanes_same(<16 x i8> %a, <16 x i8> %b) { +; CHECK-LABEL: 'fshr_v16i8_3rd_arg_vec_const_all_lanes_same' +; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %fshr = tail call <16 x i8> @llvm.fshr.v16i8(<16 x i8> %a, <16 x i8> %b, <16 x i8> ) +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %fshr +; +entry: + %fshr = tail call <16 x i8> @llvm.fshr.v16i8(<16 x i8> %a, <16 x i8> %b, <16 x i8> ) + ret <16 x i8> %fshr +} + +define <16 x i8> @fshr_v16i8_3rd_arg_vec_const_lanes_different(<16 x i8> %a, <16 x i8> %b) { +; CHECK-LABEL: 'fshr_v16i8_3rd_arg_vec_const_lanes_different' +; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %fshr = tail call <16 x i8> @llvm.fshr.v16i8(<16 x i8> %a, <16 x i8> %b, <16 x i8> ) +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %fshr +; +entry: + %fshr = tail call <16 x i8> @llvm.fshr.v16i8(<16 x i8> %a, <16 x i8> %b, <16 x i8> ) + ret <16 x i8> %fshr +} + +define <16 x i8> @fshr_v16i8_3rd_arg_var(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) { +; CHECK-LABEL: 'fshr_v16i8_3rd_arg_var' +; CHECK-NEXT: Cost Model: Found an estimated cost of 144 for instruction: %fshr = tail call <16 x i8> @llvm.fshr.v16i8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %fshr +; +entry: + %fshr = tail call <16 x i8> @llvm.fshr.v16i8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) + ret <16 x i8> %fshr +} + +declare <16 x i8> @llvm.fshr.v16i8(<16 x i8>, <16 x i8>, <16 x i8>) + +define <8 x i16> @fshr_v8i16_3rd_arg_vec_const_all_lanes_same(<8 x i16> %a, <8 x i16> %b) { +; CHECK-LABEL: 'fshr_v8i16_3rd_arg_vec_const_all_lanes_same' +; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %fshr = tail call <8 x i16> @llvm.fshr.v8i16(<8 x i16> %a, <8 x i16> %b, <8 x i16> ) +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %fshr +; +entry: + %fshr = tail call <8 x i16> @llvm.fshr.v8i16(<8 x i16> %a, <8 x i16> %b, <8 x i16> ) + ret <8 x i16> %fshr +} + +define <8 x i16> @fshr_v8i16_3rd_arg_vec_const_lanes_different(<8 x i16> %a, <8 x i16> %b) { +; CHECK-LABEL: 'fshr_v8i16_3rd_arg_vec_const_lanes_different' +; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %fshr = tail call <8 x i16> @llvm.fshr.v8i16(<8 x i16> %a, <8 x i16> %b, <8 x i16> ) +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %fshr +; +entry: + %fshr = tail call <8 x i16> @llvm.fshr.v8i16(<8 x i16> %a, <8 x i16> %b, <8 x i16> ) + ret <8 x i16> %fshr +} + +define <8 x i16> @fshr_v8i16_3rd_arg_var(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c) { +; CHECK-LABEL: 'fshr_v8i16_3rd_arg_var' +; CHECK-NEXT: Cost Model: Found an estimated cost of 72 for instruction: %fshr = tail call <8 x i16> @llvm.fshr.v8i16(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c) +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %fshr +; +entry: + %fshr = tail call <8 x i16> @llvm.fshr.v8i16(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c) + ret <8 x i16> %fshr +} + +declare <8 x i16> @llvm.fshr.v8i16(<8 x i16>, <8 x i16>, <8 x i16>) + +define <4 x i32> @fshr_v4i32_3rd_arg_vec_const_all_lanes_same(<4 x i32> %a, <4 x i32> %b) { +; CHECK-LABEL: 'fshr_v4i32_3rd_arg_vec_const_all_lanes_same' +; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %fshr = tail call <4 x i32> @llvm.fshr.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i32> ) +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %fshr +; +entry: + %fshr = tail call <4 x i32> @llvm.fshr.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i32> ) + ret <4 x i32> %fshr +} + +define <4 x i32> @fshr_v4i32_3rd_arg_vec_const_lanes_different(<4 x i32> %a, <4 x i32> %b) { +; CHECK-LABEL: 'fshr_v4i32_3rd_arg_vec_const_lanes_different' +; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %fshr = tail call <4 x i32> @llvm.fshr.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i32> ) +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %fshr +; +entry: + %fshr = tail call <4 x i32> @llvm.fshr.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i32> ) + ret <4 x i32> %fshr +} + +define <4 x i32> @fshr_v4i32_3rd_arg_var(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) { +; CHECK-LABEL: 'fshr_v4i32_3rd_arg_var' +; CHECK-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %fshr = tail call <4 x i32> @llvm.fshr.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %fshr +; +entry: + %fshr = tail call <4 x i32> @llvm.fshr.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) + ret <4 x i32> %fshr +} + +declare <4 x i32> @llvm.fshr.v4i32(<4 x i32>, <4 x i32>, <4 x i32>) + +define <2 x i64> @fshr_v2i64_3rd_arg_vec_const_all_lanes_same(<2 x i64> %a, <2 x i64> %b) { +; CHECK-LABEL: 'fshr_v2i64_3rd_arg_vec_const_all_lanes_same' +; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %fshr = tail call <2 x i64> @llvm.fshr.v2i64(<2 x i64> %a, <2 x i64> %b, <2 x i64> ) +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %fshr +; +entry: + %fshr = tail call <2 x i64> @llvm.fshr.v4i64(<2 x i64> %a, <2 x i64> %b, <2 x i64> ) + ret <2 x i64> %fshr +} + +define <2 x i64> @fshr_v2i64_3rd_arg_vec_const_lanes_different(<2 x i64> %a, <2 x i64> %b) { +; CHECK-LABEL: 'fshr_v2i64_3rd_arg_vec_const_lanes_different' +; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %fshr = tail call <2 x i64> @llvm.fshr.v2i64(<2 x i64> %a, <2 x i64> %b, <2 x i64> ) +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %fshr +; +entry: + %fshr = tail call <2 x i64> @llvm.fshr.v4i64(<2 x i64> %a, <2 x i64> %b, <2 x i64> ) + ret <2 x i64> %fshr +} + +define <2 x i64> @fshr_v2i64_3rd_arg_var(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c) { +; CHECK-LABEL: 'fshr_v2i64_3rd_arg_var' +; CHECK-NEXT: Cost Model: Found an estimated cost of 30 for instruction: %fshr = tail call <2 x i64> @llvm.fshr.v2i64(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c) +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %fshr +; +entry: + %fshr = tail call <2 x i64> @llvm.fshr.v4i64(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c) + ret <2 x i64> %fshr +} + +declare <2 x i64> @llvm.fshr.v4i64(<2 x i64>, <2 x i64>, <2 x i64>) + +define <4 x i30> @fshr_v4i30_3rd_arg_var(<4 x i30> %a, <4 x i30> %b, <4 x i30> %c) { +; CHECK-LABEL: 'fshr_v4i30_3rd_arg_var' +; CHECK-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %fshr = tail call <4 x i30> @llvm.fshr.v4i30(<4 x i30> %a, <4 x i30> %b, <4 x i30> %c) +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i30> %fshr +; +entry: + %fshr = tail call <4 x i30> @llvm.fshr.v4i30(<4 x i30> %a, <4 x i30> %b, <4 x i30> %c) + ret <4 x i30> %fshr +} + +declare <4 x i30> @llvm.fshr.v4i30(<4 x i30>, <4 x i30>, <4 x i30>) + -- 2.7.4