From 350c0fe7ea7052ed84d47bbb12ead214e6c8a726 Mon Sep 17 00:00:00 2001 From: Vladimir Makarov Date: Wed, 7 Nov 2012 22:11:08 +0000 Subject: [PATCH] re PR rtl-optimization/55122 (ICE: maximum number of LRA constraint passes is achieved (15)) 2012-11-07 Vladimir Makarov PR rtl-optimization/55122 * lra-constraints.c (match_reload): Sync values for dead input pseudos. 2012-11-07 Vladimir Makarov PR rtl-optimization/55122 * gcc.dg/pr55122.c: New test. From-SVN: r193310 --- gcc/ChangeLog | 6 ++++++ gcc/lra-constraints.c | 18 ++++++++++++++++++ gcc/testsuite/ChangeLog | 5 +++++ gcc/testsuite/gcc.dg/pr55122.c | 14 ++++++++++++++ 4 files changed, 43 insertions(+) create mode 100644 gcc/testsuite/gcc.dg/pr55122.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 24d9845..294b3a5 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2012-11-07 Vladimir Makarov + + PR rtl-optimization/55122 + * lra-constraints.c (match_reload): Sync values for dead input + pseudos. + 2012-11-07 Richard Henderson * trans-mem.c (pass_ipa_tm): Don't use TODO_update_ssa. diff --git a/gcc/lra-constraints.c b/gcc/lra-constraints.c index ae8b834..bcba590 100644 --- a/gcc/lra-constraints.c +++ b/gcc/lra-constraints.c @@ -682,6 +682,11 @@ match_reload (signed char out, signed char *ins, enum reg_class goal_class, new_out_reg = gen_lowpart_SUBREG (outmode, reg); else new_out_reg = gen_rtx_SUBREG (outmode, reg, 0); + /* If the input reg is dying here, we can use the same hard + register for REG and IN_RTX. */ + if (REG_P (in_rtx) + && find_regno_note (curr_insn, REG_DEAD, REGNO (in_rtx))) + lra_reg_info[REGNO (reg)].val = lra_reg_info[REGNO (in_rtx)].val; } else { @@ -698,6 +703,19 @@ match_reload (signed char out, signed char *ins, enum reg_class goal_class, it at the end of LRA work. */ clobber = emit_clobber (new_out_reg); LRA_TEMP_CLOBBER_P (PATTERN (clobber)) = 1; + if (GET_CODE (in_rtx) == SUBREG) + { + rtx subreg_reg = SUBREG_REG (in_rtx); + + /* If SUBREG_REG is dying here and sub-registers IN_RTX + and NEW_IN_REG are similar, we can use the same hard + register for REG and SUBREG_REG. */ + if (REG_P (subreg_reg) && GET_MODE (subreg_reg) == outmode + && SUBREG_BYTE (in_rtx) == SUBREG_BYTE (new_in_reg) + && find_regno_note (curr_insn, REG_DEAD, REGNO (subreg_reg))) + lra_reg_info[REGNO (reg)].val + = lra_reg_info[REGNO (subreg_reg)].val; + } } } else diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 4ff6ff5..6ceec1f 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2012-11-07 Vladimir Makarov + + PR rtl-optimization/55122 + * gcc.dg/pr55122.c: New test. + 2012-11-07 David Edelsohn * gcc.target/powerpc/pr46728-[1234578].c: Tighten regex to ignore diff --git a/gcc/testsuite/gcc.dg/pr55122.c b/gcc/testsuite/gcc.dg/pr55122.c new file mode 100644 index 0000000..a290ae0 --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr55122.c @@ -0,0 +1,14 @@ +/* PR rtl-optimization/55122 */ +/* { dg-do compile } */ +/* { dg-options "-O3" } */ + +int i, a; +unsigned long long b; + +void f(void) +{ + for(i = 0; i < 15; i++) + b *= b; + + b *= a ? 0 : b; +} -- 2.7.4