From 34cb0035fd6d29a68daa5c042c109690774ea85e Mon Sep 17 00:00:00 2001 From: Jamie Madill Date: Fri, 29 Apr 2016 14:36:00 -0400 Subject: [PATCH] Fix several warnings exposed in MSVS 2015. diagnostic.cpp: - unreachable code operand.cpp - conversion between int and uint32_t - unreachable code hex_float.h: - conversion from 'const int' to 'unsigned int' - unreachable code validate_id.cpp - forcing value to bool 'true' or 'false' validate_types.cpp: - forcing value to bool 'true' or 'false' --- source/diagnostic.cpp | 2 -- source/operand.cpp | 3 +-- source/util/hex_float.h | 5 +---- source/validate_id.cpp | 4 ++-- source/validate_types.cpp | 2 +- 5 files changed, 5 insertions(+), 11 deletions(-) diff --git a/source/diagnostic.cpp b/source/diagnostic.cpp index fb6af49..9da7e38 100644 --- a/source/diagnostic.cpp +++ b/source/diagnostic.cpp @@ -75,8 +75,6 @@ spv_result_t spvDiagnosticPrint(const spv_diagnostic diagnostic) { << diagnostic->error << "\n"; return SPV_SUCCESS; } - - return SPV_ERROR_INVALID_VALUE; } namespace libspirv { diff --git a/source/operand.cpp b/source/operand.cpp index 2b225fb..f25b751 100644 --- a/source/operand.cpp +++ b/source/operand.cpp @@ -228,7 +228,7 @@ void spvPrependOperandTypesForMask(const spv_operand_table operandTable, spv_operand_pattern_t* pattern) { // Scan from highest bits to lowest bits because we will prepend in LIFO // fashion, and we need the operands for lower order bits to appear first. - for (uint32_t candidate_bit = (1 << 31); candidate_bit; candidate_bit >>= 1) { + for (uint32_t candidate_bit = (1u << 31u); candidate_bit; candidate_bit >>= 1) { if (candidate_bit & mask) { spv_operand_desc entry = nullptr; if (SPV_SUCCESS == spvOperandTableValueLookup(operandTable, type, @@ -320,5 +320,4 @@ bool spvIsIdType(spv_operand_type_t type) { default: return false; } - return false; } diff --git a/source/util/hex_float.h b/source/util/hex_float.h index 25db7f6..1dd3b65 100644 --- a/source/util/hex_float.h +++ b/source/util/hex_float.h @@ -515,7 +515,7 @@ class HexFloat { // If we are up-casting, then we just have to shift to the right location. if (num_throwaway_bits <= 0) { out_val = static_cast(significand); - uint_type shift_amount = -num_throwaway_bits; + uint_type shift_amount = static_cast(-num_throwaway_bits); out_val = static_cast(out_val << shift_amount); return out_val; } @@ -567,9 +567,6 @@ class HexFloat { return static_cast( negatable_right_shift::val(significand)); } - // We really shouldn't get here. - assert(false && "We should not have ended up here"); - return 0; } // Casts this value to another HexFloat. If the cast is widening, diff --git a/source/validate_id.cpp b/source/validate_id.cpp index 7a642cb..ac68bc9 100644 --- a/source/validate_id.cpp +++ b/source/validate_id.cpp @@ -277,13 +277,13 @@ bool idUsage::isValid(const spv_instruction_t*, bool aboveZero(const std::vector& constWords, const std::vector& typeWords) { const uint32_t width = typeWords[2]; - const bool is_signed = typeWords[3]; + const bool is_signed = typeWords[3] > 0; const uint32_t loWord = constWords[3]; if (width > 32) { // The spec currently doesn't allow integers wider than 64 bits. const uint32_t hiWord = constWords[4]; // Must exist, per spec. if (is_signed && (hiWord >> 31)) return false; - return loWord | hiWord; + return (loWord | hiWord) > 0; } else { if (is_signed && (loWord >> 31)) return false; return loWord > 0; diff --git a/source/validate_types.cpp b/source/validate_types.cpp index e36454a..9ad74be 100644 --- a/source/validate_types.cpp +++ b/source/validate_types.cpp @@ -306,7 +306,7 @@ void ValidationState_t::registerCapability(SpvCapability cap) { } bool ValidationState_t::hasCapability(SpvCapability cap) const { - return module_capabilities_ & SPV_CAPABILITY_AS_MASK(cap); + return (module_capabilities_ & SPV_CAPABILITY_AS_MASK(cap)) != 0; } bool ValidationState_t::HasAnyOf(spv_capability_mask_t capabilities) const { -- 2.7.4