From 33f5dab31de4bec5c681b62a11a69eef07516db9 Mon Sep 17 00:00:00 2001 From: yroux Date: Wed, 8 Oct 2014 15:37:43 +0000 Subject: [PATCH] gcc/ 2014-10-08 Yvan Roux Backport from trunk r214825, r214826. 2014-09-02 Kyrylo Tkachov PR target/62275 * config/arm/neon.md (neon_vcvt ): New pattern. * config/arm/iterators.md (NEON_VCVT): New int iterator. * config/arm/arm_neon_builtins.def (vcvtav2sf, vcvtav4sf, vcvtauv2sf, vcvtauv4sf, vcvtpv2sf, vcvtpv4sf, vcvtpuv2sf, vcvtpuv4sf, vcvtmv2sf, vcvtmv4sf, vcvtmuv2sf, vcvtmuv4sf): New builtin definitions. * config/arm/arm.c (arm_builtin_vectorized_function): Handle BUILT_IN_LROUNDF, BUILT_IN_LFLOORF, BUILT_IN_LCEILF. 2014-09-02 Kyrylo Tkachov PR target/62275 * config/arm/iterators.md (FIXUORS): New code iterator. (VCVT): New int iterator. (su_optab): New code attribute. (su): Likewise. * config/arm/vfp.md (lsi2): New pattern. gcc/testsuite/ 2014-10-08 Yvan Roux Backport from trunk r214825, r214826, r215085. 2014-09-09 Kyrylo Tkachov * gcc.target/arm/vect-lceilf_1.c: Make input and output arrays global and 16-byte aligned. * gcc.target/arm/vect-lfloorf_1.c: Likewise. * gcc.target/arm/vect-lroundf_1.c: Likewise. * gcc.target/arm/vect-rounding-btruncf.c: Likewise. * gcc.target/arm/vect-rounding-ceilf.c: Likewise. * gcc.target/arm/vect-rounding-floorf.c: Likewise. * gcc.target/arm/vect-rounding-roundf.c: Likewise. 2014-09-02 Kyrylo Tkachov PR target/62275 * gcc.target/arm/vect-lceilf_1.c: New test. * gcc.target/arm/vect-lfloorf_1.c: Likewise. * gcc.target/arm/vect-lroundf_1.c: Likewise. 2014-09-02 Kyrylo Tkachov PR target/62275 * gcc.target/arm/lceil-vcvt_1.c: New test. * gcc.target/arm/lfloor-vcvt_1.c: Likewise. * gcc.target/arm/lround-vcvt_1.c: Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@216007 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog.linaro | 25 ++++++++++++++++ gcc/config/arm/arm.c | 34 ++++++++++++++++++++++ gcc/config/arm/arm_neon_builtins.def | 12 ++++++++ gcc/config/arm/iterators.md | 14 +++++++++ gcc/config/arm/neon.md | 11 +++++++ gcc/config/arm/vfp.md | 12 ++++++++ gcc/testsuite/ChangeLog.linaro | 28 ++++++++++++++++++ gcc/testsuite/gcc.target/arm/lceil-vcvt_1.c | 21 +++++++++++++ gcc/testsuite/gcc.target/arm/lfloor-vcvt_1.c | 21 +++++++++++++ gcc/testsuite/gcc.target/arm/lround-vcvt_1.c | 21 +++++++++++++ gcc/testsuite/gcc.target/arm/vect-lceilf_1.c | 21 +++++++++++++ gcc/testsuite/gcc.target/arm/vect-lfloorf_1.c | 21 +++++++++++++ gcc/testsuite/gcc.target/arm/vect-lroundf_1.c | 21 +++++++++++++ .../gcc.target/arm/vect-rounding-btruncf.c | 5 +++- gcc/testsuite/gcc.target/arm/vect-rounding-ceilf.c | 5 +++- .../gcc.target/arm/vect-rounding-floorf.c | 5 +++- .../gcc.target/arm/vect-rounding-roundf.c | 5 +++- 17 files changed, 278 insertions(+), 4 deletions(-) create mode 100644 gcc/testsuite/gcc.target/arm/lceil-vcvt_1.c create mode 100644 gcc/testsuite/gcc.target/arm/lfloor-vcvt_1.c create mode 100644 gcc/testsuite/gcc.target/arm/lround-vcvt_1.c create mode 100644 gcc/testsuite/gcc.target/arm/vect-lceilf_1.c create mode 100644 gcc/testsuite/gcc.target/arm/vect-lfloorf_1.c create mode 100644 gcc/testsuite/gcc.target/arm/vect-lroundf_1.c diff --git a/gcc/ChangeLog.linaro b/gcc/ChangeLog.linaro index f5a2dfe..2a26d2e 100644 --- a/gcc/ChangeLog.linaro +++ b/gcc/ChangeLog.linaro @@ -1,5 +1,30 @@ 2014-10-08 Yvan Roux + Backport from trunk r214825, r214826. + 2014-09-02 Kyrylo Tkachov + + PR target/62275 + * config/arm/neon.md + (neon_vcvt + ): New pattern. + * config/arm/iterators.md (NEON_VCVT): New int iterator. + * config/arm/arm_neon_builtins.def (vcvtav2sf, vcvtav4sf, vcvtauv2sf, + vcvtauv4sf, vcvtpv2sf, vcvtpv4sf, vcvtpuv2sf, vcvtpuv4sf, vcvtmv2sf, + vcvtmv4sf, vcvtmuv2sf, vcvtmuv4sf): New builtin definitions. + * config/arm/arm.c (arm_builtin_vectorized_function): Handle + BUILT_IN_LROUNDF, BUILT_IN_LFLOORF, BUILT_IN_LCEILF. + + 2014-09-02 Kyrylo Tkachov + + PR target/62275 + * config/arm/iterators.md (FIXUORS): New code iterator. + (VCVT): New int iterator. + (su_optab): New code attribute. + (su): Likewise. + * config/arm/vfp.md (lsi2): New pattern. + +2014-10-08 Yvan Roux + Backport from trunk r215471. 2014-09-22 James Greenhalgh diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 7c04488..e38c44f 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -29931,6 +29931,7 @@ arm_builtin_vectorized_function (tree fndecl, tree type_out, tree type_in) { enum machine_mode in_mode, out_mode; int in_n, out_n; + bool out_unsigned_p = TYPE_UNSIGNED (type_out); if (TREE_CODE (type_out) != VECTOR_TYPE || TREE_CODE (type_in) != VECTOR_TYPE) @@ -29976,6 +29977,36 @@ arm_builtin_vectorized_function (tree fndecl, tree type_out, tree type_in) return ARM_FIND_VRINT_VARIANT (vrintz); case BUILT_IN_ROUNDF: return ARM_FIND_VRINT_VARIANT (vrinta); +#undef ARM_CHECK_BUILTIN_MODE_1 +#define ARM_CHECK_BUILTIN_MODE_1(C) \ + (out_mode == SImode && out_n == C \ + && in_mode == SFmode && in_n == C) + +#define ARM_FIND_VCVT_VARIANT(N) \ + (ARM_CHECK_BUILTIN_MODE (2) \ + ? arm_builtin_decl(ARM_BUILTIN_NEON_##N##v2sfv2si, false) \ + : (ARM_CHECK_BUILTIN_MODE (4) \ + ? arm_builtin_decl(ARM_BUILTIN_NEON_##N##v4sfv4si, false) \ + : NULL_TREE)) + +#define ARM_FIND_VCVTU_VARIANT(N) \ + (ARM_CHECK_BUILTIN_MODE (2) \ + ? arm_builtin_decl(ARM_BUILTIN_NEON_##N##uv2sfv2si, false) \ + : (ARM_CHECK_BUILTIN_MODE (4) \ + ? arm_builtin_decl(ARM_BUILTIN_NEON_##N##uv4sfv4si, false) \ + : NULL_TREE)) + case BUILT_IN_LROUNDF: + return out_unsigned_p + ? ARM_FIND_VCVTU_VARIANT (vcvta) + : ARM_FIND_VCVT_VARIANT (vcvta); + case BUILT_IN_LCEILF: + return out_unsigned_p + ? ARM_FIND_VCVTU_VARIANT (vcvtp) + : ARM_FIND_VCVT_VARIANT (vcvtp); + case BUILT_IN_LFLOORF: + return out_unsigned_p + ? ARM_FIND_VCVTU_VARIANT (vcvtm) + : ARM_FIND_VCVT_VARIANT (vcvtm); #undef ARM_CHECK_BUILTIN_MODE #define ARM_CHECK_BUILTIN_MODE(C, N) \ (out_mode == N##mode && out_n == C \ @@ -30013,9 +30044,12 @@ arm_builtin_vectorized_function (tree fndecl, tree type_out, tree type_in) } return NULL_TREE; } +#undef ARM_FIND_VCVT_VARIANT +#undef ARM_FIND_VCVTU_VARIANT #undef ARM_CHECK_BUILTIN_MODE #undef ARM_FIND_VRINT_VARIANT + /* The AAPCS sets the maximum alignment of a vector to 64 bits. */ static HOST_WIDE_INT arm_vector_alignment (const_tree type) diff --git a/gcc/config/arm/arm_neon_builtins.def b/gcc/config/arm/arm_neon_builtins.def index a2e1301..229caca 100644 --- a/gcc/config/arm/arm_neon_builtins.def +++ b/gcc/config/arm/arm_neon_builtins.def @@ -142,6 +142,18 @@ VAR2 (RINT, vrintp, v2sf, v4sf), VAR2 (RINT, vrintm, v2sf, v4sf), VAR2 (RINT, vrintz, v2sf, v4sf), VAR2 (RINT, vrintx, v2sf, v4sf), +VAR1 (RINT, vcvtav2sf, v2si), +VAR1 (RINT, vcvtav4sf, v4si), +VAR1 (RINT, vcvtauv2sf, v2si), +VAR1 (RINT, vcvtauv4sf, v4si), +VAR1 (RINT, vcvtpv2sf, v2si), +VAR1 (RINT, vcvtpv4sf, v4si), +VAR1 (RINT, vcvtpuv2sf, v2si), +VAR1 (RINT, vcvtpuv4sf, v4si), +VAR1 (RINT, vcvtmv2sf, v2si), +VAR1 (RINT, vcvtmv4sf, v4si), +VAR1 (RINT, vcvtmuv2sf, v2si), +VAR1 (RINT, vcvtmuv4sf, v4si), VAR1 (VTBL, vtbl1, v8qi), VAR1 (VTBL, vtbl2, v8qi), VAR1 (VTBL, vtbl3, v8qi), diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md index 6fe6eef..021372a 100644 --- a/gcc/config/arm/iterators.md +++ b/gcc/config/arm/iterators.md @@ -194,6 +194,9 @@ ;; Right shifts (define_code_iterator rshifts [ashiftrt lshiftrt]) +;; Iterator for integer conversions +(define_code_iterator FIXUORS [fix unsigned_fix]) + ;; Binary operators whose second operand can be shifted. (define_code_iterator shiftable_ops [plus minus ior xor and]) @@ -215,9 +218,13 @@ (define_int_iterator VRINT [UNSPEC_VRINTZ UNSPEC_VRINTP UNSPEC_VRINTM UNSPEC_VRINTR UNSPEC_VRINTX UNSPEC_VRINTA]) +(define_int_iterator VCVT [UNSPEC_VRINTP UNSPEC_VRINTM UNSPEC_VRINTA]) + (define_int_iterator NEON_VRINT [UNSPEC_NVRINTP UNSPEC_NVRINTZ UNSPEC_NVRINTM UNSPEC_NVRINTX UNSPEC_NVRINTA UNSPEC_NVRINTN]) +(define_int_iterator NEON_VCVT [UNSPEC_NVRINTP UNSPEC_NVRINTM UNSPEC_NVRINTA]) + (define_int_iterator CRC [UNSPEC_CRC32B UNSPEC_CRC32H UNSPEC_CRC32W UNSPEC_CRC32CB UNSPEC_CRC32CH UNSPEC_CRC32CW]) @@ -519,6 +526,13 @@ ;; Assembler mnemonics for signedness of widening operations. (define_code_attr US [(sign_extend "s") (zero_extend "u")]) +;; Signedness suffix for float->fixed conversions. Empty for signed +;; conversion. +(define_code_attr su_optab [(fix "") (unsigned_fix "u")]) + +;; Sign prefix to use in instruction type suffixes, i.e. s32, u32. +(define_code_attr su [(fix "s") (unsigned_fix "u")]) + ;; Right shifts (define_code_attr shift [(ashiftrt "ashr") (lshiftrt "lshr")]) (define_code_attr shifttype [(ashiftrt "signed") (lshiftrt "unsigned")]) diff --git a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md index 46bd8ac..4e8fa09 100644 --- a/gcc/config/arm/neon.md +++ b/gcc/config/arm/neon.md @@ -629,6 +629,17 @@ [(set_attr "type" "neon_fp_round_")] ) +(define_insn "neon_vcvt" + [(set (match_operand: 0 "register_operand" "=w") + (FIXUORS: (unspec:VCVTF + [(match_operand:VCVTF 1 "register_operand" "w")] + NEON_VCVT)))] + "TARGET_NEON && TARGET_FPU_ARMV8" + "vcvt.32.f32\\t%0, %1" + [(set_attr "type" "neon_fp_to_int_") + (set_attr "predicable" "no")] +) + (define_insn "ior3" [(set (match_operand:VDQ 0 "s_register_operand" "=w,w") (ior:VDQ (match_operand:VDQ 1 "s_register_operand" "w,0") diff --git a/gcc/config/arm/vfp.md b/gcc/config/arm/vfp.md index c0e245c..0b3f50c 100644 --- a/gcc/config/arm/vfp.md +++ b/gcc/config/arm/vfp.md @@ -1296,6 +1296,18 @@ (set_attr "conds" "")] ) +;; Implements the lround, lfloor and lceil optabs. +(define_insn "lsi2" + [(set (match_operand:SI 0 "register_operand" "=t") + (FIXUORS:SI (unspec:SDF + [(match_operand:SDF 1 + "register_operand" "")] VCVT)))] + "TARGET_HARD_FLOAT && TARGET_FPU_ARMV8 " + "vcvt%?.32.\\t%0, %1" + [(set_attr "predicable" "no") + (set_attr "type" "f_cvtf2i")] +) + ;; MIN_EXPR and MAX_EXPR eventually map to 'smin' and 'smax' in RTL. ;; The 'smax' and 'smin' RTL standard pattern names do not specify which ;; operand will be returned when both operands are zero (i.e. they may not diff --git a/gcc/testsuite/ChangeLog.linaro b/gcc/testsuite/ChangeLog.linaro index 8c2d175..2ee4ff0 100644 --- a/gcc/testsuite/ChangeLog.linaro +++ b/gcc/testsuite/ChangeLog.linaro @@ -1,3 +1,31 @@ +2014-10-08 Yvan Roux + + Backport from trunk r214825, r214826, r215085. + 2014-09-09 Kyrylo Tkachov + + * gcc.target/arm/vect-lceilf_1.c: Make input and output arrays global + and 16-byte aligned. + * gcc.target/arm/vect-lfloorf_1.c: Likewise. + * gcc.target/arm/vect-lroundf_1.c: Likewise. + * gcc.target/arm/vect-rounding-btruncf.c: Likewise. + * gcc.target/arm/vect-rounding-ceilf.c: Likewise. + * gcc.target/arm/vect-rounding-floorf.c: Likewise. + * gcc.target/arm/vect-rounding-roundf.c: Likewise. + + 2014-09-02 Kyrylo Tkachov + + PR target/62275 + * gcc.target/arm/vect-lceilf_1.c: New test. + * gcc.target/arm/vect-lfloorf_1.c: Likewise. + * gcc.target/arm/vect-lroundf_1.c: Likewise. + + 2014-09-02 Kyrylo Tkachov + + PR target/62275 + * gcc.target/arm/lceil-vcvt_1.c: New test. + * gcc.target/arm/lfloor-vcvt_1.c: Likewise. + * gcc.target/arm/lround-vcvt_1.c: Likewise. + 2014-10-06 Venkataramanan Kumar Backport from trunk r214943. diff --git a/gcc/testsuite/gcc.target/arm/lceil-vcvt_1.c b/gcc/testsuite/gcc.target/arm/lceil-vcvt_1.c new file mode 100644 index 0000000..bbe4271 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/lceil-vcvt_1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target arm_v8_vfp_ok } */ +/* { dg-options "-O2 -march=armv8-a" } */ +/* { dg-add-options arm_v8_vfp } */ + +int +foofloat (float x) +{ + return __builtin_lceilf (x); +} + +/* { dg-final { scan-assembler-times "vcvtp.s32.f32\ts\[0-9\]+, s\[0-9\]+" 1 } } */ + + +int +foodouble (double x) +{ + return __builtin_lceil (x); +} + +/* { dg-final { scan-assembler-times "vcvtp.s32.f64\ts\[0-9\]+, d\[0-9\]+" 1 } } */ diff --git a/gcc/testsuite/gcc.target/arm/lfloor-vcvt_1.c b/gcc/testsuite/gcc.target/arm/lfloor-vcvt_1.c new file mode 100644 index 0000000..88671d3 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/lfloor-vcvt_1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target arm_v8_vfp_ok } */ +/* { dg-options "-O2 -march=armv8-a" } */ +/* { dg-add-options arm_v8_vfp } */ + +int +foofloat (float x) +{ + return __builtin_lfloorf (x); +} + +/* { dg-final { scan-assembler-times "vcvtm.s32.f32\ts\[0-9\]+, s\[0-9\]+" 1 } } */ + + +int +foodouble (double x) +{ + return __builtin_lfloor (x); +} + +/* { dg-final { scan-assembler-times "vcvtm.s32.f64\ts\[0-9\]+, d\[0-9\]+" 1 } } */ diff --git a/gcc/testsuite/gcc.target/arm/lround-vcvt_1.c b/gcc/testsuite/gcc.target/arm/lround-vcvt_1.c new file mode 100644 index 0000000..8b1f6a7 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/lround-vcvt_1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target arm_v8_vfp_ok } */ +/* { dg-options "-O2 -march=armv8-a -ffast-math" } */ +/* { dg-add-options arm_v8_vfp } */ + +int +foofloat (float x) +{ + return __builtin_lroundf (x); +} + +/* { dg-final { scan-assembler-times "vcvta.s32.f32\ts\[0-9\]+, s\[0-9\]+" 1 } } */ + + +int +foodouble (double x) +{ + return __builtin_lround (x); +} + +/* { dg-final { scan-assembler-times "vcvta.s32.f64\ts\[0-9\]+, d\[0-9\]+" 1 } } */ diff --git a/gcc/testsuite/gcc.target/arm/vect-lceilf_1.c b/gcc/testsuite/gcc.target/arm/vect-lceilf_1.c new file mode 100644 index 0000000..5e98b74 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/vect-lceilf_1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target arm_v8_neon_ok } */ +/* { dg-options "-O2 -ffast-math -ftree-vectorize -fdump-tree-vect-all" } */ +/* { dg-add-options arm_v8_neon } */ + +#define N 32 + +float __attribute__((aligned(16))) input[N]; +int __attribute__((aligned(16))) output[N]; + +void +foo () +{ + int i = 0; + /* Vectorizable. */ + for (i = 0; i < N; i++) + output[i] = __builtin_lceilf (input[i]); +} + +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */ +/* { dg-final { cleanup-tree-dump "vect" } } */ diff --git a/gcc/testsuite/gcc.target/arm/vect-lfloorf_1.c b/gcc/testsuite/gcc.target/arm/vect-lfloorf_1.c new file mode 100644 index 0000000..655f437 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/vect-lfloorf_1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target arm_v8_neon_ok } */ +/* { dg-options "-O2 -ffast-math -ftree-vectorize -fdump-tree-vect-all" } */ +/* { dg-add-options arm_v8_neon } */ + +#define N 32 + +float __attribute__((aligned(16))) input[N]; +int __attribute__((aligned(16))) output[N]; + +void +foo () +{ + int i = 0; + /* Vectorizable. */ + for (i = 0; i < N; i++) + output[i] = __builtin_lfloorf (input[i]); +} + +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */ +/* { dg-final { cleanup-tree-dump "vect" } } */ diff --git a/gcc/testsuite/gcc.target/arm/vect-lroundf_1.c b/gcc/testsuite/gcc.target/arm/vect-lroundf_1.c new file mode 100644 index 0000000..92a722e --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/vect-lroundf_1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target arm_v8_neon_ok } */ +/* { dg-options "-O2 -ffast-math -ftree-vectorize -fdump-tree-vect-all" } */ +/* { dg-add-options arm_v8_neon } */ + +#define N 32 + +float __attribute__((aligned(16))) input[N]; +int __attribute__((aligned(16))) output[N]; + +void +foo () +{ + int i = 0; + /* Vectorizable. */ + for (i = 0; i < N; i++) + output[i] = __builtin_lroundf (input[i]); +} + +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */ +/* { dg-final { cleanup-tree-dump "vect" } } */ diff --git a/gcc/testsuite/gcc.target/arm/vect-rounding-btruncf.c b/gcc/testsuite/gcc.target/arm/vect-rounding-btruncf.c index ff033d4..29b16cc 100644 --- a/gcc/testsuite/gcc.target/arm/vect-rounding-btruncf.c +++ b/gcc/testsuite/gcc.target/arm/vect-rounding-btruncf.c @@ -5,8 +5,11 @@ #define N 32 +float __attribute__((aligned(16))) input[N]; +float __attribute__((aligned(16))) output[N]; + void -foo (float *output, float *input) +foo () { int i = 0; /* Vectorizable. */ diff --git a/gcc/testsuite/gcc.target/arm/vect-rounding-ceilf.c b/gcc/testsuite/gcc.target/arm/vect-rounding-ceilf.c index b54f358..36d6a42 100644 --- a/gcc/testsuite/gcc.target/arm/vect-rounding-ceilf.c +++ b/gcc/testsuite/gcc.target/arm/vect-rounding-ceilf.c @@ -5,8 +5,11 @@ #define N 32 +float __attribute__((aligned(16))) input[N]; +float __attribute__((aligned(16))) output[N]; + void -foo (float *output, float *input) +foo () { int i = 0; /* Vectorizable. */ diff --git a/gcc/testsuite/gcc.target/arm/vect-rounding-floorf.c b/gcc/testsuite/gcc.target/arm/vect-rounding-floorf.c index 02e188d..8242700 100644 --- a/gcc/testsuite/gcc.target/arm/vect-rounding-floorf.c +++ b/gcc/testsuite/gcc.target/arm/vect-rounding-floorf.c @@ -5,8 +5,11 @@ #define N 32 +float __attribute__((aligned(16))) input[N]; +float __attribute__((aligned(16))) output[N]; + void -foo (float *output, float *input) +foo () { int i = 0; /* Vectorizable. */ diff --git a/gcc/testsuite/gcc.target/arm/vect-rounding-roundf.c b/gcc/testsuite/gcc.target/arm/vect-rounding-roundf.c index 85e2058..d550174 100644 --- a/gcc/testsuite/gcc.target/arm/vect-rounding-roundf.c +++ b/gcc/testsuite/gcc.target/arm/vect-rounding-roundf.c @@ -5,8 +5,11 @@ #define N 32 +float __attribute__((aligned(16))) input[N]; +float __attribute__((aligned(16))) output[N]; + void -foo (float *output, float *input) +foo () { int i = 0; /* Vectorizable. */ -- 2.7.4