From 33d2c00814b27437a1681cc3d1fb5fa6ca7e1536 Mon Sep 17 00:00:00 2001
From: Simon Pilgrim <llvm-dev@redking.me.uk>
Date: Sat, 19 Mar 2022 16:26:20 +0000
Subject: [PATCH] [X86] Add test showing a bug where a BLENDV mask is being
 constant folded as VSELECT mask

combineSelect doesn't expect X86ISD::BLENDV ops to appear before legalization and is treating the constant mask as a vselect mask (mask != 0) instead of blendv (mask < 0)
---
 llvm/test/CodeGen/X86/avx-select.ll | 32 ++++++++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/llvm/test/CodeGen/X86/avx-select.ll b/llvm/test/CodeGen/X86/avx-select.ll
index ea64973..ada4942 100644
--- a/llvm/test/CodeGen/X86/avx-select.ll
+++ b/llvm/test/CodeGen/X86/avx-select.ll
@@ -58,3 +58,35 @@ define <4 x i64> @select01(i32 %a, <4 x i64> %b) nounwind {
   ret <4 x i64> %res
 }
 
+; FIXME: If a X86ISD::BLENDV node appears before legalization, its been constant folded like a vselect (mask != 0) instead of (mask < 0)
+define void @fold_blendv_mask(<4 x i32> %a0) {
+; X86-LABEL: fold_blendv_mask:
+; X86:       # %bb.0: # %entry
+; X86-NEXT:    vmovaps {{.*#+}} ymm0 = [26146,4294966039,4294967294,4294964244,29361,4294951202,4294964216,4294941010]
+; X86-NEXT:    vmovaps %ymm0, (%eax)
+; X86-NEXT:    vzeroupper
+; X86-NEXT:    retl
+;
+; X64-LABEL: fold_blendv_mask:
+; X64:       # %bb.0: # %entry
+; X64-NEXT:    vmovaps {{.*#+}} ymm0 = [26146,4294966039,4294967294,4294964244,29361,4294951202,4294964216,4294941010]
+; X64-NEXT:    vmovaps %ymm0, (%rax)
+; X64-NEXT:    vzeroupper
+; X64-NEXT:    retq
+entry:
+  br label %head
+
+head:
+  %v0 = insertelement <4 x i32> %a0, i32 44158, i64 0
+  %v1 = insertelement <4 x i32> %v0, i32 54560, i64 1
+  %v2 = insertelement <4 x i32> %v1, i32 45291, i64 2
+  %v3 = insertelement <4 x i32> %v2, i32 18686, i64 3
+  %isneg = icmp slt <4 x i32> %v3, zeroinitializer
+  %or0 = select <4 x i1> %isneg, <4 x i32> <i32 26146, i32 -1257, i32 -2, i32 -3052>, <4 x i32> <i32 -24947, i32 7802, i32 29242, i32 15858>
+  %or1 = shufflevector <4 x i32> %or0, <4 x i32> <i32 29361, i32 -16094, i32 -3080, i32 -26286>, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
+  br i1 undef, label %exit, label %head
+
+exit:
+  store <8 x i32> %or1, <8 x i32> addrspace(1)* undef, align 32
+  ret void
+}
-- 
2.7.4