From 3395762edd7232d976179b232c93cd901b739367 Mon Sep 17 00:00:00 2001 From: Andre Vieira Date: Wed, 25 Nov 2015 13:56:55 +0000 Subject: [PATCH] Fix ldah being disassembled as ldaexh 2015-12-02 Andre Vieira opcodes/ * arm-dis.c (arm_opcodes): : Fix typo... : ... to this. gas/testsuite/ * gas/arm/armv8-a.d: : Rename mismatched mnemonics ... : ... to this. --- gas/testsuite/ChangeLog | 5 +++++ gas/testsuite/gas/arm/armv8-a.d | 6 +++--- opcodes/ChangeLog | 5 +++++ opcodes/arm-dis.c | 2 +- 4 files changed, 14 insertions(+), 4 deletions(-) diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index e73a977..f3ffe38 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2015-12-02 Andre Vieira + + * gas/arm/armv8-a.d: : Rename mismatched mnemonics ... + : ... to this. + 2015-11-27 Matthew Wahab * gas/aarch64/float-fp16.d: New. diff --git a/gas/testsuite/gas/arm/armv8-a.d b/gas/testsuite/gas/arm/armv8-a.d index 60e5067..2119bcb 100644 --- a/gas/testsuite/gas/arm/armv8-a.d +++ b/gas/testsuite/gas/arm/armv8-a.d @@ -32,9 +32,9 @@ Disassembly of section .text: 0[0-9a-f]+ <[^>]+> e1d00c9f ldab r0, \[r0\] 0[0-9a-f]+ <[^>]+> e1d11c9f ldab r1, \[r1\] 0[0-9a-f]+ <[^>]+> e1deec9f ldab lr, \[lr\] -0[0-9a-f]+ <[^>]+> e1f00c9f ldaexh r0, \[r0\] -0[0-9a-f]+ <[^>]+> e1f11c9f ldaexh r1, \[r1\] -0[0-9a-f]+ <[^>]+> e1feec9f ldaexh lr, \[lr\] +0[0-9a-f]+ <[^>]+> e1f00c9f ldah r0, \[r0\] +0[0-9a-f]+ <[^>]+> e1f11c9f ldah r1, \[r1\] +0[0-9a-f]+ <[^>]+> e1feec9f ldah lr, \[lr\] 0[0-9a-f]+ <[^>]+> e1900c9f lda r0, \[r0\] 0[0-9a-f]+ <[^>]+> e1911c9f lda r1, \[r1\] 0[0-9a-f]+ <[^>]+> e19eec9f lda lr, \[lr\] diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 8024b52..7b097f3 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2015-12-02 Andre Vieira + + * arm-dis.c (arm_opcodes): : Fix typo... + : ... to this. + 2015-11-27 Matthew Wahab * aarch64-asm-2.c: Regenerate. diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c index cff4b3f..94fe304 100644 --- a/opcodes/arm-dis.c +++ b/opcodes/arm-dis.c @@ -1608,7 +1608,7 @@ static const struct opcode32 arm_opcodes[] = {ARM_FEATURE_CORE_LOW (ARM_EXT_V8), 0x01e0fc90, 0x0ff0fff0, "stlh%c\t%0-3r, [%16-19R]"}, {ARM_FEATURE_CORE_LOW (ARM_EXT_V8), - 0x01f00c9f, 0x0ff00fff, "ldaexh%c\t%12-15r, [%16-19R]"}, + 0x01f00c9f, 0x0ff00fff, "ldah%c\t%12-15r, [%16-19R]"}, /* CRC32 instructions. */ {ARM_FEATURE_COPROC (CRC_EXT_ARMV8), 0xe1000040, 0xfff00ff0, "crc32b\t%12-15R, %16-19R, %0-3R"}, -- 2.7.4