From 3369406e44b0226295e7475e189da2e42efd7f22 Mon Sep 17 00:00:00 2001 From: Rob Clark Date: Thu, 23 Jan 2020 10:26:27 -0800 Subject: [PATCH] freedreno/ir3: fix kill scheduling kill (and other cat0/flow instructions) do not have a dst register. Which was mostly harmless before, other than RA thinking it would need a free register to write. (But nothing consumed it, so the value would be immediately dead.) But this would cause more problems with postsched which would see a bogus dependency. Also, post-RA sched *does* need to see the dependency on the predicate register. Signed-off-by: Rob Clark Part-of: --- src/freedreno/ir3/ir3.h | 2 +- src/freedreno/ir3/ir3_compiler_nir.c | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/src/freedreno/ir3/ir3.h b/src/freedreno/ir3/ir3.h index b9cf06e..b10f2f0 100644 --- a/src/freedreno/ir3/ir3.h +++ b/src/freedreno/ir3/ir3.h @@ -794,7 +794,7 @@ static inline bool is_meta(struct ir3_instruction *instr) static inline unsigned dest_regs(struct ir3_instruction *instr) { - if ((instr->regs_count == 0) || is_store(instr)) + if ((instr->regs_count == 0) || is_store(instr) || is_flow(instr)) return 0; return util_last_bit(instr->regs[0]->wrmask); diff --git a/src/freedreno/ir3/ir3_compiler_nir.c b/src/freedreno/ir3/ir3_compiler_nir.c index c5a1f91..1305264 100644 --- a/src/freedreno/ir3/ir3_compiler_nir.c +++ b/src/freedreno/ir3/ir3_compiler_nir.c @@ -1780,6 +1780,7 @@ emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr) cond->regs[0]->flags &= ~IR3_REG_SSA; kill = ir3_KILL(b, cond, 0); + kill->regs[1]->num = regid(REG_P0, 0); array_insert(ctx->ir, ctx->ir->predicates, kill); array_insert(b, b->keeps, kill); -- 2.7.4