From 334d91b9407c5f9f37f224b0f43551c01964eff1 Mon Sep 17 00:00:00 2001 From: Alan Modra Date: Mon, 6 May 2019 08:43:32 +0930 Subject: [PATCH] PowerPC reloc symbols that shouldn't be adjusted GOT and PLT relocs shouldn't have their symbols replaced with a section symbol plus added. Nor should the HIGHA TLS relocations, which failed to be caught by the range test in ppc_fix_adjustable. bfd/ * reloc.c (BFD_RELOC_PPC64_TPREL16_HIGH, BFD_RELOC_PPC64_TPREL16_HIGHA), (BFD_RELOC_PPC64_DTPREL16_HIGH, BFD_RELOC_PPC64_DTPREL16_HIGHA): Sort before BFD_RELOC_PPC64_DTPREL16_HIGHESTA entry. gas/ * config/tc-ppc.c (ppc_fix_adjustable): Exclude all GOT and PLT relocs, and VLE sdarel relocs. * testsuite/gas/ppc/power4.d: Adjust. --- bfd/ChangeLog | 8 ++++++++ bfd/bfd-in2.h | 8 ++++---- bfd/libbfd.h | 8 ++++---- bfd/reloc.c | 16 ++++++++-------- gas/ChangeLog | 6 ++++++ gas/config/tc-ppc.c | 20 ++++++++++++++++++++ gas/testsuite/gas/ppc/power4.d | 2 +- 7 files changed, 51 insertions(+), 17 deletions(-) diff --git a/bfd/ChangeLog b/bfd/ChangeLog index 6f7f19a..0907098 100644 --- a/bfd/ChangeLog +++ b/bfd/ChangeLog @@ -1,3 +1,11 @@ +2019-05-06 Alan Modra + + * reloc.c (BFD_RELOC_PPC64_TPREL16_HIGH, BFD_RELOC_PPC64_TPREL16_HIGHA), + (BFD_RELOC_PPC64_DTPREL16_HIGH, BFD_RELOC_PPC64_DTPREL16_HIGHA): + Sort before BFD_RELOC_PPC64_DTPREL16_HIGHESTA entry. + * libbfd.h: Regenerate. + * bfd-in2.h: Regenerate. + 2019-05-04 Alan Modra PR 24511 diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h index 13af0bea..9f60f57 100644 --- a/bfd/bfd-in2.h +++ b/bfd/bfd-in2.h @@ -3521,20 +3521,20 @@ instruction. */ BFD_RELOC_PPC_GOT_DTPREL16_HA, BFD_RELOC_PPC64_TPREL16_DS, BFD_RELOC_PPC64_TPREL16_LO_DS, + BFD_RELOC_PPC64_TPREL16_HIGH, + BFD_RELOC_PPC64_TPREL16_HIGHA, BFD_RELOC_PPC64_TPREL16_HIGHER, BFD_RELOC_PPC64_TPREL16_HIGHERA, BFD_RELOC_PPC64_TPREL16_HIGHEST, BFD_RELOC_PPC64_TPREL16_HIGHESTA, BFD_RELOC_PPC64_DTPREL16_DS, BFD_RELOC_PPC64_DTPREL16_LO_DS, + BFD_RELOC_PPC64_DTPREL16_HIGH, + BFD_RELOC_PPC64_DTPREL16_HIGHA, BFD_RELOC_PPC64_DTPREL16_HIGHER, BFD_RELOC_PPC64_DTPREL16_HIGHERA, BFD_RELOC_PPC64_DTPREL16_HIGHEST, BFD_RELOC_PPC64_DTPREL16_HIGHESTA, - BFD_RELOC_PPC64_TPREL16_HIGH, - BFD_RELOC_PPC64_TPREL16_HIGHA, - BFD_RELOC_PPC64_DTPREL16_HIGH, - BFD_RELOC_PPC64_DTPREL16_HIGHA, /* IBM 370/390 relocations */ BFD_RELOC_I370_D12, diff --git a/bfd/libbfd.h b/bfd/libbfd.h index b51df73..d9b7fb7 100644 --- a/bfd/libbfd.h +++ b/bfd/libbfd.h @@ -1508,20 +1508,20 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", "BFD_RELOC_PPC_GOT_DTPREL16_HA", "BFD_RELOC_PPC64_TPREL16_DS", "BFD_RELOC_PPC64_TPREL16_LO_DS", + "BFD_RELOC_PPC64_TPREL16_HIGH", + "BFD_RELOC_PPC64_TPREL16_HIGHA", "BFD_RELOC_PPC64_TPREL16_HIGHER", "BFD_RELOC_PPC64_TPREL16_HIGHERA", "BFD_RELOC_PPC64_TPREL16_HIGHEST", "BFD_RELOC_PPC64_TPREL16_HIGHESTA", "BFD_RELOC_PPC64_DTPREL16_DS", "BFD_RELOC_PPC64_DTPREL16_LO_DS", + "BFD_RELOC_PPC64_DTPREL16_HIGH", + "BFD_RELOC_PPC64_DTPREL16_HIGHA", "BFD_RELOC_PPC64_DTPREL16_HIGHER", "BFD_RELOC_PPC64_DTPREL16_HIGHERA", "BFD_RELOC_PPC64_DTPREL16_HIGHEST", "BFD_RELOC_PPC64_DTPREL16_HIGHESTA", - "BFD_RELOC_PPC64_TPREL16_HIGH", - "BFD_RELOC_PPC64_TPREL16_HIGHA", - "BFD_RELOC_PPC64_DTPREL16_HIGH", - "BFD_RELOC_PPC64_DTPREL16_HIGHA", "BFD_RELOC_I370_D12", "BFD_RELOC_CTOR", "BFD_RELOC_ARM_PCREL_BRANCH", diff --git a/bfd/reloc.c b/bfd/reloc.c index 9615279..f146581 100644 --- a/bfd/reloc.c +++ b/bfd/reloc.c @@ -2946,6 +2946,10 @@ ENUMX ENUMX BFD_RELOC_PPC64_TPREL16_LO_DS ENUMX + BFD_RELOC_PPC64_TPREL16_HIGH +ENUMX + BFD_RELOC_PPC64_TPREL16_HIGHA +ENUMX BFD_RELOC_PPC64_TPREL16_HIGHER ENUMX BFD_RELOC_PPC64_TPREL16_HIGHERA @@ -2958,6 +2962,10 @@ ENUMX ENUMX BFD_RELOC_PPC64_DTPREL16_LO_DS ENUMX + BFD_RELOC_PPC64_DTPREL16_HIGH +ENUMX + BFD_RELOC_PPC64_DTPREL16_HIGHA +ENUMX BFD_RELOC_PPC64_DTPREL16_HIGHER ENUMX BFD_RELOC_PPC64_DTPREL16_HIGHERA @@ -2965,14 +2973,6 @@ ENUMX BFD_RELOC_PPC64_DTPREL16_HIGHEST ENUMX BFD_RELOC_PPC64_DTPREL16_HIGHESTA -ENUMX - BFD_RELOC_PPC64_TPREL16_HIGH -ENUMX - BFD_RELOC_PPC64_TPREL16_HIGHA -ENUMX - BFD_RELOC_PPC64_DTPREL16_HIGH -ENUMX - BFD_RELOC_PPC64_DTPREL16_HIGHA ENUMDOC PowerPC and PowerPC64 thread-local storage relocations. diff --git a/gas/ChangeLog b/gas/ChangeLog index b5703cd..640fee1 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,9 @@ +2019-05-06 Alan Modra + + * config/tc-ppc.c (ppc_fix_adjustable): Exclude all GOT and PLT + relocs, and VLE sdarel relocs. + * testsuite/gas/ppc/power4.d: Adjust. + 2019-05-05 Alexandre Oliva * dwarf2dbg.c (set_or_check_view): Skip heads when assigning diff --git a/gas/config/tc-ppc.c b/gas/config/tc-ppc.c index c71fe94..d5d51f7 100644 --- a/gas/config/tc-ppc.c +++ b/gas/config/tc-ppc.c @@ -6765,7 +6765,27 @@ ppc_fix_adjustable (fixS *fix) && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS + && fix->fx_r_type != BFD_RELOC_16_GOT_PCREL + && fix->fx_r_type != BFD_RELOC_32_GOTOFF + && fix->fx_r_type != BFD_RELOC_24_PLT_PCREL + && fix->fx_r_type != BFD_RELOC_32_PLTOFF + && fix->fx_r_type != BFD_RELOC_32_PLT_PCREL + && fix->fx_r_type != BFD_RELOC_LO16_PLTOFF + && fix->fx_r_type != BFD_RELOC_HI16_PLTOFF + && fix->fx_r_type != BFD_RELOC_HI16_S_PLTOFF + && fix->fx_r_type != BFD_RELOC_64_PLTOFF + && fix->fx_r_type != BFD_RELOC_64_PLT_PCREL + && fix->fx_r_type != BFD_RELOC_PPC64_PLT16_LO_DS + && fix->fx_r_type != BFD_RELOC_PPC64_PLTGOT16 + && fix->fx_r_type != BFD_RELOC_PPC64_PLTGOT16_LO + && fix->fx_r_type != BFD_RELOC_PPC64_PLTGOT16_HI + && fix->fx_r_type != BFD_RELOC_PPC64_PLTGOT16_HA + && fix->fx_r_type != BFD_RELOC_PPC64_PLTGOT16_DS + && fix->fx_r_type != BFD_RELOC_PPC64_PLTGOT16_LO_DS && fix->fx_r_type != BFD_RELOC_GPREL16 + && fix->fx_r_type != BFD_RELOC_PPC_VLE_SDAREL_LO16A + && fix->fx_r_type != BFD_RELOC_PPC_VLE_SDAREL_HI16A + && fix->fx_r_type != BFD_RELOC_PPC_VLE_SDAREL_HA16A && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS diff --git a/gas/testsuite/gas/ppc/power4.d b/gas/testsuite/gas/ppc/power4.d index cb487a7..d3e78a6 100644 --- a/gas/testsuite/gas/ppc/power4.d +++ b/gas/testsuite/gas/ppc/power4.d @@ -57,7 +57,7 @@ Disassembly of section \.text: .*: (e0 c3 00 00|00 00 c3 e0) lq r6,0\(r3\) .*: R_PPC64_GOT16_LO_DS dsym0 .*: (e0 c3 00 00|00 00 c3 e0) lq r6,0\(r3\) -.*: R_PPC64_PLT16_LO_DS \.data +.*: R_PPC64_PLT16_LO_DS dsym0 .*: (e0 c3 00 .0|.0 00 c3 e0) lq r6,.*\(r3\) .*: R_PPC64_SECTOFF_DS \.data\+0x10 .*: (e0 c3 00 .0|.0 00 c3 e0) lq r6,.*\(r3\) -- 2.7.4