From 322a51b549c2db2d93f6cf84ff7df225779b5584 Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Fri, 2 Mar 2018 15:01:32 +0100 Subject: [PATCH] ac: add ac_build_fsign() Signed-off-by: Samuel Pitoiset Reviewed-by: Timothy Arceri --- src/amd/common/ac_llvm_build.c | 23 +++++++++++++++++++ src/amd/common/ac_llvm_build.h | 3 +++ src/amd/common/ac_nir_to_llvm.c | 27 ++--------------------- src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c | 15 ++++--------- 4 files changed, 32 insertions(+), 36 deletions(-) diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c index cab8396..8140184 100644 --- a/src/amd/common/ac_llvm_build.c +++ b/src/amd/common/ac_llvm_build.c @@ -1731,6 +1731,29 @@ LLVMValueRef ac_build_isign(struct ac_llvm_context *ctx, LLVMValueRef src0, return val; } +LLVMValueRef ac_build_fsign(struct ac_llvm_context *ctx, LLVMValueRef src0, + unsigned bitsize) +{ + LLVMValueRef cmp, val, zero, one; + LLVMTypeRef type; + + if (bitsize == 32) { + type = ctx->f32; + zero = ctx->f32_0; + one = ctx->f32_1; + } else { + type = ctx->f64; + zero = ctx->f64_0; + one = ctx->f64_1; + } + + cmp = LLVMBuildFCmp(ctx->builder, LLVMRealOGT, src0, zero, ""); + val = LLVMBuildSelect(ctx->builder, cmp, one, src0, ""); + cmp = LLVMBuildFCmp(ctx->builder, LLVMRealOGE, val, zero, ""); + val = LLVMBuildSelect(ctx->builder, cmp, val, LLVMConstReal(type, -1.0), ""); + return val; +} + void ac_get_image_intr_name(const char *base_name, LLVMTypeRef data_type, LLVMTypeRef coords_type, diff --git a/src/amd/common/ac_llvm_build.h b/src/amd/common/ac_llvm_build.h index 860c25f..4eee9b3 100644 --- a/src/amd/common/ac_llvm_build.h +++ b/src/amd/common/ac_llvm_build.h @@ -341,6 +341,9 @@ LLVMValueRef ac_build_fract(struct ac_llvm_context *ctx, LLVMValueRef src0, LLVMValueRef ac_build_isign(struct ac_llvm_context *ctx, LLVMValueRef src0, unsigned bitsize); +LLVMValueRef ac_build_fsign(struct ac_llvm_context *ctx, LLVMValueRef src0, + unsigned bitsize); + void ac_get_image_intr_name(const char *base_name, LLVMTypeRef data_type, LLVMTypeRef coords_type, diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index 70198fb..d2df283 100644 --- a/src/amd/common/ac_nir_to_llvm.c +++ b/src/amd/common/ac_nir_to_llvm.c @@ -1338,30 +1338,6 @@ static LLVMValueRef emit_iabs(struct ac_llvm_context *ctx, LLVMBuildNeg(ctx->builder, src0, "")); } -static LLVMValueRef emit_fsign(struct ac_llvm_context *ctx, - LLVMValueRef src0, - unsigned bitsize) -{ - LLVMValueRef cmp, val, zero, one; - LLVMTypeRef type; - - if (bitsize == 32) { - type = ctx->f32; - zero = ctx->f32_0; - one = ctx->f32_1; - } else { - type = ctx->f64; - zero = ctx->f64_0; - one = ctx->f64_1; - } - - cmp = LLVMBuildFCmp(ctx->builder, LLVMRealOGT, src0, zero, ""); - val = LLVMBuildSelect(ctx->builder, cmp, one, src0, ""); - cmp = LLVMBuildFCmp(ctx->builder, LLVMRealOGE, val, zero, ""); - val = LLVMBuildSelect(ctx->builder, cmp, val, LLVMConstReal(type, -1.0), ""); - return val; -} - static LLVMValueRef emit_uint_carry(struct ac_llvm_context *ctx, const char *intrin, LLVMValueRef src0, LLVMValueRef src1) @@ -1789,7 +1765,8 @@ static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr) break; case nir_op_fsign: src[0] = ac_to_float(&ctx->ac, src[0]); - result = emit_fsign(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size); + result = ac_build_fsign(&ctx->ac, src[0], + instr->dest.dest.ssa.bit_size); break; case nir_op_ffloor: result = emit_intrin_1f_param(&ctx->ac, "llvm.floor", diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c b/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c index 8798493..201e498 100644 --- a/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c +++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c @@ -348,24 +348,17 @@ static void emit_ssg(const struct lp_build_tgsi_action *action, struct lp_build_emit_data *emit_data) { struct si_shader_context *ctx = si_shader_context(bld_base); - LLVMBuilderRef builder = ctx->ac.builder; - LLVMValueRef cmp, val; + LLVMValueRef val; if (emit_data->inst->Instruction.Opcode == TGSI_OPCODE_I64SSG) { val = ac_build_isign(&ctx->ac, emit_data->args[0], 64); } else if (emit_data->inst->Instruction.Opcode == TGSI_OPCODE_ISSG) { val = ac_build_isign(&ctx->ac, emit_data->args[0], 32); } else if (emit_data->inst->Instruction.Opcode == TGSI_OPCODE_DSSG) { - cmp = LLVMBuildFCmp(builder, LLVMRealOGT, emit_data->args[0], bld_base->dbl_bld.zero, ""); - val = LLVMBuildSelect(builder, cmp, bld_base->dbl_bld.one, emit_data->args[0], ""); - cmp = LLVMBuildFCmp(builder, LLVMRealOGE, val, bld_base->dbl_bld.zero, ""); - val = LLVMBuildSelect(builder, cmp, val, LLVMConstReal(bld_base->dbl_bld.elem_type, -1), ""); - } else { // float SSG - cmp = LLVMBuildFCmp(builder, LLVMRealOGT, emit_data->args[0], ctx->ac.f32_0, ""); - val = LLVMBuildSelect(builder, cmp, ctx->ac.f32_1, emit_data->args[0], ""); - cmp = LLVMBuildFCmp(builder, LLVMRealOGE, val, ctx->ac.f32_0, ""); - val = LLVMBuildSelect(builder, cmp, val, LLVMConstReal(ctx->f32, -1), ""); + val = ac_build_fsign(&ctx->ac, emit_data->args[0], 64); + } else { + val = ac_build_fsign(&ctx->ac, emit_data->args[0], 32); } emit_data->output[emit_data->chan] = val; -- 2.7.4