From 31a0ab9213f780d2fa1da6e4879df214c0f247f9 Mon Sep 17 00:00:00 2001 From: Christophe Lyon Date: Thu, 28 Jan 2021 17:55:45 +0000 Subject: [PATCH] arm: Adjust cost of vector of constant zero Neon vector comparisons have a dedicated version when comparing with constant zero: it means its cost is free. Adjust the cost in arm_rtx_costs_internal accordingly, for Neon only, since MVE does not support this. 2021-01-28 Christophe Lyon gcc/ PR target/98730 * config/arm/arm.c (arm_rtx_costs_internal): Adjust cost of vector of constant zero for comparisons. gcc/testsuite/ PR target/98730 * gcc.target/arm/simd/vceqzq_p64.c: Update expected result. --- gcc/config/arm/arm.c | 20 ++++++++++++++++---- gcc/testsuite/gcc.target/arm/simd/vceqzq_p64.c | 2 +- 2 files changed, 17 insertions(+), 5 deletions(-) diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index bebccc1..e22396d 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -11211,11 +11211,23 @@ arm_rtx_costs_internal (rtx x, enum rtx_code code, enum rtx_code outer_code, return true; case EQ: - case NE: - case LT: - case LE: - case GT: case GE: + case GT: + case LE: + case LT: + /* Neon has special instructions when comparing with 0 (vceq, vcge, vcgt, + vcle and vclt). */ + if (TARGET_NEON + && TARGET_HARD_FLOAT + && (VALID_NEON_DREG_MODE (mode) || VALID_NEON_QREG_MODE (mode)) + && (XEXP (x, 1) == CONST0_RTX (mode))) + { + *cost = 0; + return true; + } + + /* Fall through. */ + case NE: case LTU: case LEU: case GEU: diff --git a/gcc/testsuite/gcc.target/arm/simd/vceqzq_p64.c b/gcc/testsuite/gcc.target/arm/simd/vceqzq_p64.c index 640754c..a99bb8a 100644 --- a/gcc/testsuite/gcc.target/arm/simd/vceqzq_p64.c +++ b/gcc/testsuite/gcc.target/arm/simd/vceqzq_p64.c @@ -15,4 +15,4 @@ void func() result2 = vceqzq_p64 (v2); } -/* { dg-final { scan-assembler-times "vceq\.i32\[ \t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+\n" 2 } } */ +/* { dg-final { scan-assembler-times "vceq\.i32\[ \t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+, #0\n" 2 } } */ -- 2.7.4