From 312ab094197d02c8a3d2d28671efb6510ff1a09e Mon Sep 17 00:00:00 2001 From: Christian Hemp Date: Wed, 19 Jul 2023 09:13:07 +0200 Subject: [PATCH] arm64: dts: imx8mp-phycore-som: Remove eth phy interrupt In some occasions the ethernet phy IRQ can not be detected correctly by the SoC. This leads to a non detected link in Linux. The problem is caused by the buffer that adjusts the voltage between ethernet phy and SoC. To workaround this, remove the IRQ support for the ethernet phy and use polling instead. Signed-off-by: Christian Hemp Signed-off-by: Teresa Remmet Signed-off-by: Shawn Guo --- arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi | 3 --- 1 file changed, 3 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi index ecc4bce..e73f171 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi @@ -54,8 +54,6 @@ ethphy1: ethernet-phy@0 { compatible = "ethernet-phy-ieee802.3-c22"; reg = <0>; - interrupt-parent = <&gpio1>; - interrupts = <15 IRQ_TYPE_EDGE_FALLING>; ti,rx-internal-delay = ; ti,tx-internal-delay = ; ti,fifo-depth = ; @@ -222,7 +220,6 @@ MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3 0x14 MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL 0x14 MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC 0x14 - MX8MP_IOMUXC_GPIO1_IO15__GPIO1_IO15 0x11 >; }; -- 2.7.4