From 2fd8269c6f2aea523497f4c9932e53ab0e2a6f01 Mon Sep 17 00:00:00 2001 From: Simon Pilgrim Date: Sun, 22 Apr 2018 15:02:23 +0000 Subject: [PATCH] [X86][MMX][SSE] Tag missed PHADD/PHSUB instructions with WritePHAdd llvm-svn: 330545 --- llvm/lib/Target/X86/X86InstrMMX.td | 6 +++--- llvm/lib/Target/X86/X86InstrSSE.td | 4 ++-- llvm/test/CodeGen/X86/avx2-schedule.ll | 8 ++++---- 3 files changed, 9 insertions(+), 9 deletions(-) diff --git a/llvm/lib/Target/X86/X86InstrMMX.td b/llvm/lib/Target/X86/X86InstrMMX.td index 8001cee..85e4f18 100644 --- a/llvm/lib/Target/X86/X86InstrMMX.td +++ b/llvm/lib/Target/X86/X86InstrMMX.td @@ -339,11 +339,11 @@ defm MMX_PSUBUSW : MMXI_binop_rm_int<0xD9, "psubusw", int_x86_mmx_psubus_w, WriteVecALU>; defm MMX_PHSUBW : SS3I_binop_rm_int_mm<0x05, "phsubw", int_x86_ssse3_phsub_w, - WriteVecALU>; + WritePHAdd>; defm MMX_PHSUBD : SS3I_binop_rm_int_mm<0x06, "phsubd", int_x86_ssse3_phsub_d, - WriteVecALU>; + WritePHAdd>; defm MMX_PHSUBSW : SS3I_binop_rm_int_mm<0x07, "phsubsw",int_x86_ssse3_phsub_sw, - WriteVecALU>; + WritePHAdd>; // -- Multiplication defm MMX_PMULLW : MMXI_binop_rm_int<0xD5, "pmullw", int_x86_mmx_pmull_w, diff --git a/llvm/lib/Target/X86/X86InstrSSE.td b/llvm/lib/Target/X86/X86InstrSSE.td index 06ae046..cf375ea 100644 --- a/llvm/lib/Target/X86/X86InstrSSE.td +++ b/llvm/lib/Target/X86/X86InstrSSE.td @@ -4710,10 +4710,10 @@ let isCommutable = 0 in { WriteVecALU>, VEX_4V, VEX_L, VEX_WIG; defm VPHADDSW : SS3I_binop_rm_int_y<0x03, "vphaddsw", int_x86_avx2_phadd_sw, - WriteVecALU>, VEX_4V, VEX_L, VEX_WIG; + WritePHAdd>, VEX_4V, VEX_L, VEX_WIG; defm VPHSUBSW : SS3I_binop_rm_int_y<0x07, "vphsubsw", int_x86_avx2_phsub_sw, - WriteVecALU>, VEX_4V, VEX_L, VEX_WIG; + WritePHAdd>, VEX_4V, VEX_L, VEX_WIG; } } diff --git a/llvm/test/CodeGen/X86/avx2-schedule.ll b/llvm/test/CodeGen/X86/avx2-schedule.ll index 065bc62..c4eba61 100644 --- a/llvm/test/CodeGen/X86/avx2-schedule.ll +++ b/llvm/test/CodeGen/X86/avx2-schedule.ll @@ -3081,8 +3081,8 @@ declare <8 x i32> @llvm.x86.avx2.phadd.d(<8 x i32>, <8 x i32>) nounwind readnone define <16 x i16> @test_phaddsw(<16 x i16> %a0, <16 x i16> %a1, <16 x i16> *%a2) { ; GENERIC-LABEL: test_phaddsw: ; GENERIC: # %bb.0: -; GENERIC-NEXT: vphaddsw %ymm1, %ymm0, %ymm0 # sched: [3:1.00] -; GENERIC-NEXT: vphaddsw (%rdi), %ymm0, %ymm0 # sched: [8:1.00] +; GENERIC-NEXT: vphaddsw %ymm1, %ymm0, %ymm0 # sched: [1:0.50] +; GENERIC-NEXT: vphaddsw (%rdi), %ymm0, %ymm0 # sched: [6:0.50] ; GENERIC-NEXT: retq # sched: [1:1.00] ; ; HASWELL-LABEL: test_phaddsw: @@ -3210,8 +3210,8 @@ declare <8 x i32> @llvm.x86.avx2.phsub.d(<8 x i32>, <8 x i32>) nounwind readnone define <16 x i16> @test_phsubsw(<16 x i16> %a0, <16 x i16> %a1, <16 x i16> *%a2) { ; GENERIC-LABEL: test_phsubsw: ; GENERIC: # %bb.0: -; GENERIC-NEXT: vphsubsw %ymm1, %ymm0, %ymm0 # sched: [3:1.00] -; GENERIC-NEXT: vphsubsw (%rdi), %ymm0, %ymm0 # sched: [8:1.00] +; GENERIC-NEXT: vphsubsw %ymm1, %ymm0, %ymm0 # sched: [1:0.50] +; GENERIC-NEXT: vphsubsw (%rdi), %ymm0, %ymm0 # sched: [6:0.50] ; GENERIC-NEXT: retq # sched: [1:1.00] ; ; HASWELL-LABEL: test_phsubsw: -- 2.7.4