From 2fa39159b6a9931d6fd82ecbe65357e0ad77e1a4 Mon Sep 17 00:00:00 2001 From: Shawn Lin Date: Mon, 14 Nov 2016 15:20:57 -0600 Subject: [PATCH] Documentation/devicetree: Add PCIe max-link-speed property Some of the host drivers have the requirement of knowing whether the EP would never train at some link speed at all. For instance, on some boards, the link won't train at 5 GT/s but the host driver still sacrifice some cycles to wait for the result of training at 5 GT/s as the host could actually support 5 GT/s. So we could parse this new property and make the host drivers be aware of these cases. Signed-off-by: Shawn Lin Signed-off-by: Bjorn Helgaas Acked-by: Rob Herring --- Documentation/devicetree/bindings/pci/pci.txt | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/pci.txt b/Documentation/devicetree/bindings/pci/pci.txt index 08dcfad0..50f9e2c 100644 --- a/Documentation/devicetree/bindings/pci/pci.txt +++ b/Documentation/devicetree/bindings/pci/pci.txt @@ -18,3 +18,9 @@ driver implementation may support the following properties: host bridges in the system, otherwise potentially conflicting domain numbers may be assigned to root buses behind different host bridges. The domain number for each host bridge in the system must be unique. +- max-link-speed: + If present this property specifies PCI gen for link capability. Host + drivers could add this as a strategy to avoid unnecessary operation for + unsupported link speed, for instance, trying to do training for + unsupported link speed, etc. Must be '4' for gen4, '3' for gen3, '2' + for gen2, and '1' for gen1. Any other values are invalid. -- 2.7.4