From 2f0dd1405e8eae32a81d007dc779337c318727d9 Mon Sep 17 00:00:00 2001 From: Benjamin Kramer Date: Tue, 3 Jul 2018 20:40:04 +0000 Subject: [PATCH] [NVPTX] Expand v2f16 INSERT_VECTOR_ELT Vectorization can create them. llvm-svn: 336227 --- llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp | 1 + llvm/test/CodeGen/NVPTX/f16x2-instructions.ll | 8 ++++++++ 2 files changed, 9 insertions(+) diff --git a/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp b/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp index 19842b9..2536623 100644 --- a/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp +++ b/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp @@ -375,6 +375,7 @@ NVPTXTargetLowering::NVPTXTargetLowering(const NVPTXTargetMachine &TM, setOperationAction(ISD::FP_TO_SINT, MVT::f16, Legal); setOperationAction(ISD::BUILD_VECTOR, MVT::v2f16, Custom); setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v2f16, Custom); + setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v2f16, Expand); setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v2f16, Expand); setFP16OperationAction(ISD::SETCC, MVT::f16, Legal, Promote); diff --git a/llvm/test/CodeGen/NVPTX/f16x2-instructions.ll b/llvm/test/CodeGen/NVPTX/f16x2-instructions.ll index 3d58cfa..bd945b9 100644 --- a/llvm/test/CodeGen/NVPTX/f16x2-instructions.ll +++ b/llvm/test/CodeGen/NVPTX/f16x2-instructions.ll @@ -1431,5 +1431,13 @@ define <2 x half> @test_shufflevector(<2 x half> %a) #0 { ret <2 x half> %s } +; CHECK-LABEL: test_insertelement( +; CHECK: mov.b32 {%h2, %tmp_hi}, %hh1; +; CHECK: mov.b32 %hh2, {%h2, %h1}; +define <2 x half> @test_insertelement(<2 x half> %a, half %x) #0 { + %i = insertelement <2 x half> %a, half %x, i64 1 + ret <2 x half> %i +} + attributes #0 = { nounwind } attributes #1 = { "unsafe-fp-math" = "true" } -- 2.7.4