From 2d6a6469b8ae3ad6617d276e9d6689a250497815 Mon Sep 17 00:00:00 2001 From: Bas Nieuwenhuizen Date: Tue, 6 Apr 2021 11:30:34 +0200 Subject: [PATCH] nir: Add bvh64_intersect_ray_amd intrinsic. MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Reviewed-by: Daniel Schürmann Part-of: --- src/compiler/nir/nir_divergence_analysis.c | 1 + src/compiler/nir/nir_intrinsics.py | 8 ++++++++ 2 files changed, 9 insertions(+) diff --git a/src/compiler/nir/nir_divergence_analysis.c b/src/compiler/nir/nir_divergence_analysis.c index 8d4d6ab..9777ee7 100644 --- a/src/compiler/nir/nir_divergence_analysis.c +++ b/src/compiler/nir/nir_divergence_analysis.c @@ -320,6 +320,7 @@ visit_intrinsic(nir_shader *shader, nir_intrinsic_instr *instr) case nir_intrinsic_is_sparse_texels_resident: case nir_intrinsic_sparse_residency_code_and: case nir_intrinsic_load_sbt_amd: + case nir_intrinsic_bvh64_intersect_ray_amd: case nir_intrinsic_get_ubo_size: case nir_intrinsic_load_ssbo_address: { unsigned num_srcs = nir_intrinsic_infos[instr->intrinsic].num_srcs; diff --git a/src/compiler/nir/nir_intrinsics.py b/src/compiler/nir/nir_intrinsics.py index 30b5397..072a366 100644 --- a/src/compiler/nir/nir_intrinsics.py +++ b/src/compiler/nir/nir_intrinsics.py @@ -1153,6 +1153,14 @@ intrinsic("alloc_vertices_and_primitives_amd", src_comp=[1, 1], indices=[]) intrinsic("load_sbt_amd", src_comp=[-1], dest_comp=0, indices=[BINDING, BASE], flags=[CAN_ELIMINATE, CAN_REORDER]) +# 1. HW descriptor +# 2. BVH node(64-bit pointer as 2x32 ...) +# 3. ray extent +# 4. ray origin +# 5. ray direction +# 6. inverse ray direction (componentwise 1.0/ray direction) +intrinsic("bvh64_intersect_ray_amd", [4, 2, 1, 3, 3, 3], 4, flags=[CAN_ELIMINATE, CAN_REORDER]) + # V3D-specific instrinc for tile buffer color reads. # # The hardware requires that we read the samples and components of a pixel -- 2.7.4