From 2d30267e8e8ea61a8ee7cf48392d993699cbb114 Mon Sep 17 00:00:00 2001 From: Bastian Koppelmann Date: Mon, 1 Sep 2014 12:59:48 +0100 Subject: [PATCH] target-tricore: Add softmmu support Add basic softmmu support for TriCore Signed-off-by: Bastian Koppelmann Message-id: 1409572800-4116-4-git-send-email-kbastian@mail.uni-paderborn.de Signed-off-by: Peter Maydell --- target-tricore/helper.c | 54 +++++++++++++++++++++++++++++++++++++++++++++- target-tricore/op_helper.c | 33 +++++++++++++++++++++++++++- 2 files changed, 85 insertions(+), 2 deletions(-) diff --git a/target-tricore/helper.c b/target-tricore/helper.c index ee7f007..e4af6f1 100644 --- a/target-tricore/helper.c +++ b/target-tricore/helper.c @@ -24,10 +24,62 @@ #include "cpu.h" +enum { + TLBRET_DIRTY = -4, + TLBRET_INVALID = -3, + TLBRET_NOMATCH = -2, + TLBRET_BADADDR = -1, + TLBRET_MATCH = 0 +}; + +#if defined(CONFIG_SOFTMMU) +static int get_physical_address(CPUTriCoreState *env, hwaddr *physical, + int *prot, target_ulong address, + int rw, int access_type) +{ + int ret = TLBRET_MATCH; + + *physical = address & 0xFFFFFFFF; + *prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC; + + return ret; +} +#endif + +/* TODO: Add exeption support*/ +static void raise_mmu_exception(CPUTriCoreState *env, target_ulong address, + int rw, int tlb_error) +{ +} + int cpu_tricore_handle_mmu_fault(CPUState *cs, target_ulong address, int rw, int mmu_idx) { - return 0; + TriCoreCPU *cpu = TRICORE_CPU(cs); + CPUTriCoreState *env = &cpu->env; + hwaddr physical; + int prot; + int access_type; + int ret = 0; + + rw &= 1; + access_type = ACCESS_INT; + ret = get_physical_address(env, &physical, &prot, + address, rw, access_type); + qemu_log("%s address=" TARGET_FMT_lx " ret %d physical " TARGET_FMT_plx + " prot %d\n", __func__, address, ret, physical, prot); + + if (ret == TLBRET_MATCH) { + tlb_set_page(cs, address & TARGET_PAGE_MASK, + physical & TARGET_PAGE_MASK, prot | PAGE_EXEC, + mmu_idx, TARGET_PAGE_SIZE); + ret = 0; + } else if (ret < 0) { + raise_mmu_exception(env, address, rw, ret); + ret = 1; + } + + return ret; } void tricore_cpu_do_interrupt(CPUState *cs) diff --git a/target-tricore/op_helper.c b/target-tricore/op_helper.c index 275790b..c1342e9 100644 --- a/target-tricore/op_helper.c +++ b/target-tricore/op_helper.c @@ -20,8 +20,39 @@ #include "exec/helper-proto.h" #include "exec/cpu_ldst.h" +static inline void QEMU_NORETURN do_raise_exception_err(CPUTriCoreState *env, + uint32_t exception, + int error_code, + uintptr_t pc) +{ + CPUState *cs = CPU(tricore_env_get_cpu(env)); + cs->exception_index = exception; + env->error_code = error_code; + + if (pc) { + /* now we have a real cpu fault */ + cpu_restore_state(cs, pc); + } + + cpu_loop_exit(cs); +} + +static inline void QEMU_NORETURN do_raise_exception(CPUTriCoreState *env, + uint32_t exception, + uintptr_t pc) +{ + do_raise_exception_err(env, exception, 0, pc); +} + void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx, uintptr_t retaddr) { + int ret; + ret = cpu_tricore_handle_mmu_fault(cs, addr, is_write, mmu_idx); + if (ret) { + TriCoreCPU *cpu = TRICORE_CPU(cs); + CPUTriCoreState *env = &cpu->env; + do_raise_exception_err(env, cs->exception_index, + env->error_code, retaddr); + } } - -- 2.7.4