From 2d14a8f23721cba2f66ddecbece09a024dc1b45a Mon Sep 17 00:00:00 2001 From: Rhys Perry Date: Mon, 16 Mar 2020 17:11:16 +0000 Subject: [PATCH] aco: fix operand order for LS VGPR init bug workaround MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Fixes: a952bf3946 ('aco: Fix LS VGPR init bug on affected hardware.') Signed-off-by: Rhys Perry Reviewed-By: Timur Kristóf Tested-by: Marge Bot Part-of: --- src/amd/compiler/aco_instruction_selection.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp index ff39ad8..29d40d1 100644 --- a/src/amd/compiler/aco_instruction_selection.cpp +++ b/src/amd/compiler/aco_instruction_selection.cpp @@ -9502,16 +9502,16 @@ void fix_ls_vgpr_init_bug(isel_context *ctx, Pseudo_instruction *startpgm) /* If there are no HS threads, SPI mistakenly loads the LS VGPRs starting at VGPR 0. */ Temp instance_id = bld.vop2(aco_opcode::v_cndmask_b32, bld.def(v1), - get_arg(ctx, ctx->args->ac.instance_id), get_arg(ctx, ctx->args->rel_auto_id), + get_arg(ctx, ctx->args->ac.instance_id), ls_has_nonzero_hs_threads); Temp rel_auto_id = bld.vop2(aco_opcode::v_cndmask_b32, bld.def(v1), - get_arg(ctx, ctx->args->rel_auto_id), get_arg(ctx, ctx->args->ac.tcs_rel_ids), + get_arg(ctx, ctx->args->rel_auto_id), ls_has_nonzero_hs_threads); Temp vertex_id = bld.vop2(aco_opcode::v_cndmask_b32, bld.def(v1), - get_arg(ctx, ctx->args->ac.vertex_id), get_arg(ctx, ctx->args->ac.tcs_patch_id), + get_arg(ctx, ctx->args->ac.vertex_id), ls_has_nonzero_hs_threads); ctx->arg_temps[ctx->args->ac.instance_id.arg_index] = instance_id; -- 2.7.4