From 2c2019389ef7286279edd1a120739906b1a61138 Mon Sep 17 00:00:00 2001 From: Ken Werner Date: Wed, 24 Nov 2010 23:23:48 +0000 Subject: [PATCH] Use __sync_* on ARM where supported by the compiler. --- ChangeLog.arm | 6 ++++++ sysdeps/unix/sysv/linux/arm/nptl/bits/atomic.h | 13 +++++++++++-- 2 files changed, 17 insertions(+), 2 deletions(-) diff --git a/ChangeLog.arm b/ChangeLog.arm index 08ed967..693d1e7 100644 --- a/ChangeLog.arm +++ b/ChangeLog.arm @@ -1,3 +1,9 @@ +2010-11-24 Ken Werner + + * sysdeps/unix/sysv/linux/arm/nptl/bits/atomic.h (atomic_full_barrier, + __arch_compare_and_exchange_val_32_acq): Use the atomic builtins + provided by GCC if __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 is defined. + 2010-11-22 Andreas Schwab * sysdeps/arm/preconfigure: Only modify CFLAGS when configuring diff --git a/sysdeps/unix/sysv/linux/arm/nptl/bits/atomic.h b/sysdeps/unix/sysv/linux/arm/nptl/bits/atomic.h index b0586ea..979db9f 100644 --- a/sysdeps/unix/sysv/linux/arm/nptl/bits/atomic.h +++ b/sysdeps/unix/sysv/linux/arm/nptl/bits/atomic.h @@ -37,7 +37,12 @@ typedef uintmax_t uatomic_max_t; void __arm_link_error (void); -#ifdef __thumb2__ +/* Use the atomic builtins provided by GCC in case the backend provides + a pattern to do this efficiently. */ + +#ifdef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 +#define atomic_full_barrier() __sync_synchronize () +#elif defined __thumb2__ #define atomic_full_barrier() \ __asm__ __volatile__ \ ("movw\tip, #0x0fa0\n\t" \ @@ -64,11 +69,15 @@ void __arm_link_error (void); #define __arch_compare_and_exchange_val_16_acq(mem, newval, oldval) \ ({ __arm_link_error (); oldval; }) +#ifdef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 +#define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \ + __sync_val_compare_and_swap ((mem), (oldval), (newval)) + /* It doesn't matter what register is used for a_oldval2, but we must specify one to work around GCC PR rtl-optimization/21223. Otherwise it may cause a_oldval or a_tmp to be moved to a different register. */ -#ifdef __thumb2__ +#elif defined __thumb2__ /* Thumb-2 has ldrex/strex. However it does not have barrier instructions, so we still need to use the kernel helper. */ #define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \ -- 2.7.4