From 2b7a89bc941707baccf9f3acdc8ca48d489b524c Mon Sep 17 00:00:00 2001 From: Nick Hawkins Date: Wed, 8 Jun 2022 16:21:39 -0500 Subject: [PATCH] ARM: dts: Add device tree files for hpe gxp soc The HPE SoC is new to linux. A basic device tree layout with minimum required for linux to boot including a timer and watchdog support has been created. The dts file is empty at this point but will be updated in subsequent updates as board specific features are enabled. Signed-off-by: Nick Hawkins --- arch/arm/dts/Makefile | 2 + arch/arm/dts/hpe-bmc-dl360gen10.dts | 26 ++++++++ arch/arm/dts/hpe-gxp-u-boot.dtsi | 25 +++++++ arch/arm/dts/hpe-gxp.dtsi | 127 ++++++++++++++++++++++++++++++++++++ 4 files changed, 180 insertions(+) create mode 100644 arch/arm/dts/hpe-bmc-dl360gen10.dts create mode 100644 arch/arm/dts/hpe-gxp-u-boot.dtsi create mode 100644 arch/arm/dts/hpe-gxp.dtsi diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 2873d04..4b940f8 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -1247,6 +1247,8 @@ dtb-$(CONFIG_TARGET_POMELO) += phytium-pomelo.dtb dtb-$(CONFIG_TARGET_PRESIDIO_ASIC) += ca-presidio-engboard.dtb +dtb-$(CONFIG_TARGET_GXP) += hpe-bmc-dl360gen10.dts + dtb-$(CONFIG_TARGET_IMX8MM_CL_IOT_GATE) += imx8mm-cl-iot-gate.dtb \ imx8mm-cl-iot-gate-ied.dtbo \ imx8mm-cl-iot-gate-ied-adc0.dtbo \ diff --git a/arch/arm/dts/hpe-bmc-dl360gen10.dts b/arch/arm/dts/hpe-bmc-dl360gen10.dts new file mode 100644 index 0000000..b8030d9 --- /dev/null +++ b/arch/arm/dts/hpe-bmc-dl360gen10.dts @@ -0,0 +1,26 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree file for HPE DL360Gen10 + */ + +/include/ "hpe-gxp-u-boot.dtsi" + +/ { + #address-cells = <1>; + #size-cells = <1>; + compatible = "hpe,gxp-dl360gen10", "hpe,gxp"; + model = "Hewlett Packard Enterprise ProLiant dl360 Gen10"; + + aliases { + serial0 = &uartc; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@40000000 { + device_type = "memory"; + reg = <0x40000000 0x20000000>; + }; +}; diff --git a/arch/arm/dts/hpe-gxp-u-boot.dtsi b/arch/arm/dts/hpe-gxp-u-boot.dtsi new file mode 100644 index 0000000..7a2b488 --- /dev/null +++ b/arch/arm/dts/hpe-gxp-u-boot.dtsi @@ -0,0 +1,25 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree file for HPE GXP + */ + +/include/ "hpe-gxp.dtsi" + +/ { + + axi { + u-boot,dm-pre-reloc; + + ahb@c0000000 { + u-boot,dm-pre-reloc; + + spi0: spi@200 { + compatible = "hpe,gxp-spi"; + reg = <0x200 0x80>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + }; + }; + }; +}; diff --git a/arch/arm/dts/hpe-gxp.dtsi b/arch/arm/dts/hpe-gxp.dtsi new file mode 100644 index 0000000..cf735b3 --- /dev/null +++ b/arch/arm/dts/hpe-gxp.dtsi @@ -0,0 +1,127 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree file for HPE GXP + */ + +/dts-v1/; +/ { + model = "Hewlett Packard Enterprise GXP BMC"; + compatible = "hpe,gxp"; + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + compatible = "arm,cortex-a9"; + reg = <0>; + device_type = "cpu"; + next-level-cache = <&L2>; + }; + }; + + clocks { + pll: clock-0 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <1600000000>; + }; + + iopclk: clock-1 { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clock-div = <4>; + clock-mult = <1>; + clocks = <&pll>; + }; + }; + + axi { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + dma-ranges; + + L2: cache-controller@b0040000 { + compatible = "arm,pl310-cache"; + reg = <0xb0040000 0x1000>; + cache-unified; + cache-level = <2>; + }; + + ahb@c0000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0xc0000000 0x30000000>; + dma-ranges; + + vic0: interrupt-controller@eff0000 { + compatible = "arm,pl192-vic"; + reg = <0xeff0000 0x1000>; + interrupt-controller; + #interrupt-cells = <1>; + }; + + vic1: interrupt-controller@80f00000 { + compatible = "arm,pl192-vic"; + reg = <0x80f00000 0x1000>; + interrupt-controller; + #interrupt-cells = <1>; + }; + + uarta: serial@e0 { + compatible = "ns16550a"; + reg = <0xe0 0x8>; + interrupts = <17>; + interrupt-parent = <&vic0>; + clock-frequency = <1846153>; + reg-shift = <0>; + }; + + uartb: serial@e8 { + compatible = "ns16550a"; + reg = <0xe8 0x8>; + interrupts = <18>; + interrupt-parent = <&vic0>; + clock-frequency = <1846153>; + reg-shift = <0>; + }; + + uartc: serial@f0 { + compatible = "ns16550a"; + reg = <0xf0 0x8>; + interrupts = <19>; + interrupt-parent = <&vic0>; + clock-frequency = <1846153>; + reg-shift = <0>; + }; + + usb0: usb@efe0000 { + compatible = "hpe,gxp-ehci", "generic-ehci"; + reg = <0xefe0000 0x100>; + interrupts = <7>; + interrupt-parent = <&vic0>; + }; + + st: timer@80 { + compatible = "hpe,gxp-timer"; + reg = <0x80 0x16>; + interrupts = <0>; + interrupt-parent = <&vic0>; + clocks = <&iopclk>; + clock-names = "iop"; + }; + + usb1: usb@efe0100 { + compatible = "hpe,gxp-ohci", "generic-ohci"; + reg = <0xefe0100 0x110>; + interrupts = <6>; + interrupt-parent = <&vic0>; + }; + }; + }; +}; -- 2.7.4