From 2b399dbabd48639ab4daac462c9d82c6cf3f99cc Mon Sep 17 00:00:00 2001 From: Uros Bizjak Date: Wed, 9 Feb 2022 20:18:10 +0100 Subject: [PATCH] i386: Force inputs to a register to avoid lowpart_subreg failure [PR104458] MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Input operands can be in the form of: (subreg:DI (reg:V2SF 96) 0) which chokes lowpart_subreg. Force inputs to a register, which is preferable even when the input operand is from memory. 2022-02-09 Uroš Bizjak gcc/ChangeLog: PR target/104458 * config/i386/i386-expand.cc (ix86_split_idivmod): Force operands[2] and operands[3] into a register.. gcc/testsuite/ChangeLog: PR target/104458 * gcc.target/i386/pr104458.c: New test. --- gcc/config/i386/i386-expand.cc | 3 +++ gcc/testsuite/gcc.target/i386/pr104458.c | 13 +++++++++++++ 2 files changed, 16 insertions(+) create mode 100644 gcc/testsuite/gcc.target/i386/pr104458.c diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc index eb1930b..ce9607e 100644 --- a/gcc/config/i386/i386-expand.cc +++ b/gcc/config/i386/i386-expand.cc @@ -1407,6 +1407,9 @@ ix86_split_idivmod (machine_mode mode, rtx operands[], rtx scratch, tmp0, tmp1, tmp2; rtx (*gen_divmod4_1) (rtx, rtx, rtx, rtx); + operands[2] = force_reg (mode, operands[2]); + operands[3] = force_reg (mode, operands[3]); + switch (mode) { case E_SImode: diff --git a/gcc/testsuite/gcc.target/i386/pr104458.c b/gcc/testsuite/gcc.target/i386/pr104458.c new file mode 100644 index 0000000..d1d28c1 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr104458.c @@ -0,0 +1,13 @@ +/* PR target/104458 */ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-O1 -m8bit-idiv" } */ + +typedef float __attribute__((__vector_size__ (8))) F; + +int i; + +void +foo (F f) +{ + i += i % (long) f; +} -- 2.7.4