From 2adafc0512625bbd090dc37a353ddda15d525e9d Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Fri, 28 May 2021 16:07:36 +0200 Subject: [PATCH] clk: rockchip: export ACLK_VCODEC for RK3036 It is required for the series at [1] to let hantro driver aquire the clock and set the rate for RK3036 correctly, but I didn't want to add a patch for yet another subsystem to this series. [1] https://lore.kernel.org/linux-media/20210525152225.154302-1-knaerzche@gmail.com/ Signed-off-by: Alex Bee Link: https://lore.kernel.org/r/20210528140736.79686-1-knaerzche@gmail.com Signed-off-by: Heiko Stuebner --- drivers/clk/rockchip/clk-rk3036.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/rockchip/clk-rk3036.c b/drivers/clk/rockchip/clk-rk3036.c index 91d56ad..614845c 100644 --- a/drivers/clk/rockchip/clk-rk3036.c +++ b/drivers/clk/rockchip/clk-rk3036.c @@ -259,7 +259,7 @@ static struct rockchip_clk_branch rk3036_clk_branches[] __initdata = { RK2928_CLKGATE_CON(1), 13, GFLAGS, &rk3036_uart2_fracmux), - COMPOSITE(0, "aclk_vcodec", mux_pll_src_3plls_p, 0, + COMPOSITE(ACLK_VCODEC, "aclk_vcodec", mux_pll_src_3plls_p, 0, RK2928_CLKSEL_CON(32), 14, 2, MFLAGS, 8, 5, DFLAGS, RK2928_CLKGATE_CON(3), 11, GFLAGS), FACTOR_GATE(HCLK_VCODEC, "hclk_vcodec", "aclk_vcodec", 0, 1, 4, -- 2.7.4