From 2a9efbf2484d554f7e63c8f83be0c861e160d251 Mon Sep 17 00:00:00 2001 From: Kang Zhang Date: Mon, 12 Aug 2019 17:50:01 +0000 Subject: [PATCH] [NFC][PowerPC] Add the test case shrink-wrap.mir and shrink-wrap.ll for PPC llvm-svn: 368597 --- llvm/test/CodeGen/PowerPC/shrink-wrap.ll | 54 +++++++++++++ llvm/test/CodeGen/PowerPC/shrink-wrap.mir | 130 ++++++++++++++++++++++++++++++ 2 files changed, 184 insertions(+) create mode 100644 llvm/test/CodeGen/PowerPC/shrink-wrap.ll create mode 100644 llvm/test/CodeGen/PowerPC/shrink-wrap.mir diff --git a/llvm/test/CodeGen/PowerPC/shrink-wrap.ll b/llvm/test/CodeGen/PowerPC/shrink-wrap.ll new file mode 100644 index 0000000..74a83fe --- /dev/null +++ b/llvm/test/CodeGen/PowerPC/shrink-wrap.ll @@ -0,0 +1,54 @@ +; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64le-unknown-unknown -mcpu=pwr9 | FileCheck %s +define signext i32 @shrinkwrapme(i32 signext %a, i32 signext %lim) { +entry: + %cmp5 = icmp sgt i32 %lim, 0 + br i1 %cmp5, label %for.body.preheader, label %for.cond.cleanup + + for.body.preheader: ; preds = %entry + br label %for.body + + for.cond.cleanup.loopexit: ; preds = %for.body + br label %for.cond.cleanup + + for.cond.cleanup: ; preds = %for.cond.cleanup.loopexit, %entry + %Ret.0.lcssa = phi i32 [ 0, %entry ], [ %0, %for.cond.cleanup.loopexit ] + ret i32 %Ret.0.lcssa + + for.body: ; preds = %for.body.preheader, %for.body + %i.07 = phi i32 [ %inc, %for.body ], [ 0, %for.body.preheader ] + %Ret.06 = phi i32 [ %0, %for.body ], [ 0, %for.body.preheader ] + %0 = tail call i32 asm "add $0, $1, $2", "=r,r,r,~{r14},~{r15},~{r16},~{r17},~{r18},~{r19},~{r20},~{r21},~{r22},~{r23},~{r24},~{r25},~{r26},~{r27},~{r28},~{r29},~{r30},~{r31}"(i32 %a, i32 %Ret.06) + %inc = add nuw nsw i32 %i.07, 1 + %exitcond = icmp eq i32 %inc, %lim + br i1 %exitcond, label %for.cond.cleanup.loopexit, label %for.body + +; CHECK-LABEL: shrinkwrapme +; CHECK: # %bb.0: +; CHECK-NEXT: cmpwi +; Prolog code +; CHECK: std +; CHECK: std +; CHECK: std +; CHECK: std +; CHECK: blt 0, .LBB0_3 +; CHECK: # %bb.1: +; CHECK-NEXT: addi +; CHECK-NEXT: clrldi +; CHECK-NEXT: addi +; CHECK-NEXT: mtctr +; CHECK-NEXT: li +; CHECK: .LBB0_2: +; CHECK: add +; CHECK: bdnz .LBB0_2 +; CHECK-NEXT: b .LBB0_4 +; CHECK: .LBB0_3: +; CHECK-NEXT: li +; CHECK: .LBB0_4: +; Epilog code +; CHECK: ld +; CHECK: ld +; CHECK: extsw +; CHECK: ld +; CHECK: ld +; CHECK: blr +} diff --git a/llvm/test/CodeGen/PowerPC/shrink-wrap.mir b/llvm/test/CodeGen/PowerPC/shrink-wrap.mir new file mode 100644 index 0000000..6715d62 --- /dev/null +++ b/llvm/test/CodeGen/PowerPC/shrink-wrap.mir @@ -0,0 +1,130 @@ +# RUN: llc -verify-machineinstrs -mcpu=pwr9 -mtriple powerpc64le-unknown-linux-gnu \ +# RUN: -run-pass=shrink-wrap -o - %s | FileCheck %s +--- | + ; ModuleID = 'test.ll' + source_filename = "test.ll" + target datalayout = "e-m:e-i64:64-n32:64" + + define signext i32 @shrinkwrapme(i32 signext %a, i32 signext %lim) { + entry: + %cmp5 = icmp sgt i32 %lim, 0 + br i1 %cmp5, label %for.body.preheader, label %for.cond.cleanup + + for.body.preheader: ; preds = %entry + %0 = add i32 %lim, -1 + %1 = zext i32 %0 to i64 + %2 = add nuw nsw i64 %1, 1 + call void @llvm.set.loop.iterations.i64(i64 %2) + br label %for.body + + for.cond.cleanup: ; preds = %for.body, %entry + %Ret.0.lcssa = phi i32 [ 0, %entry ], [ %3, %for.body ] + ret i32 %Ret.0.lcssa + + for.body: ; preds = %for.body, %for.body.preheader + %Ret.06 = phi i32 [ %3, %for.body ], [ 0, %for.body.preheader ] + %3 = tail call i32 asm "add $0, $1, $2", "=r,r,r,~{r14},~{r15},~{r16},~{r17},~{r18},~{r19},~{r20},~{r21},~{r22},~{r23},~{r24},~{r25},~{r26},~{r27},~{r28},~{r29},~{r30},~{r31}"(i32 %a, i32 %Ret.06) + %4 = call i1 @llvm.loop.decrement.i64(i64 1) + br i1 %4, label %for.body, label %for.cond.cleanup + } + + ; Function Attrs: noduplicate nounwind + declare void @llvm.set.loop.iterations.i64(i64) #0 + + ; Function Attrs: noduplicate nounwind + declare i1 @llvm.loop.decrement.i64(i64) #0 + + ; Function Attrs: nounwind + declare void @llvm.stackprotector(i8*, i8**) #1 + + attributes #0 = { noduplicate nounwind } + attributes #1 = { nounwind } + +... +--- +name: shrinkwrapme +alignment: 4 +exposesReturnsTwice: false +legalized: false +regBankSelected: false +selected: false +failedISel: false +tracksRegLiveness: true +hasWinCFI: false +registers: [] +liveins: + - { reg: '$x3', virtual-reg: '' } + - { reg: '$x4', virtual-reg: '' } +frameInfo: + isFrameAddressTaken: false + isReturnAddressTaken: false + hasStackMap: false + hasPatchPoint: false + stackSize: 0 + offsetAdjustment: 0 + maxAlignment: 0 + adjustsStack: false + hasCalls: false + stackProtector: '' + maxCallFrameSize: 4294967295 + cvBytesOfCalleeSavedRegisters: 0 + hasOpaqueSPAdjustment: false + hasVAStart: false + hasMustTailInVarArgFunc: false + localFrameSize: 0 + savePoint: '' + restorePoint: '' +fixedStack: [] +stack: [] +callSites: [] +constants: [] +machineFunctionInfo: {} +body: | + bb.0.entry: + successors: %bb.2(0x50000000), %bb.1(0x30000000) + liveins: $x3, $x4 + + renamable $cr0 = CMPWI renamable $r4, 1 + BCC 4, killed renamable $cr0, %bb.2 + + bb.1: + successors: %bb.3(0x80000000) + + renamable $r4 = LI 0 + B %bb.3 + + bb.2.for.body.preheader: + successors: %bb.4(0x80000000) + liveins: $x3, $x4 + + renamable $r4 = ADDI renamable $r4, -1, implicit killed $x4, implicit-def $x4 + renamable $x4 = RLDICL killed renamable $x4, 0, 32 + renamable $x4 = nuw nsw ADDI8 killed renamable $x4, 1 + MTCTR8loop killed renamable $x4, implicit-def dead $ctr8 + renamable $r4 = LI 0 + B %bb.4 + + bb.3.for.cond.cleanup: + liveins: $r4 + + renamable $x3 = EXTSW_32_64 killed renamable $r4 + BLR8 implicit $lr8, implicit $rm, implicit $x3 + + bb.4.for.body: + successors: %bb.4(0x7c000000), %bb.3(0x04000000) + liveins: $r4, $x3 + + INLINEASM &"add $0, $1, $2", 0, 131082, def renamable $r4, 131081, renamable $r3, 131081, killed renamable $r4, 12, implicit-def dead early-clobber $r14, 12, implicit-def dead early-clobber $r15, 12, implicit-def dead early-clobber $r16, 12, implicit-def dead early-clobber $r17, 12, implicit-def dead early-clobber $r18, 12, implicit-def dead early-clobber $r19, 12, implicit-def dead early-clobber $r20, 12, implicit-def dead early-clobber $r21, 12, implicit-def dead early-clobber $r22, 12, implicit-def dead early-clobber $r23, 12, implicit-def dead early-clobber $r24, 12, implicit-def dead early-clobber $r25, 12, implicit-def dead early-clobber $r26, 12, implicit-def dead early-clobber $r27, 12, implicit-def dead early-clobber $r28, 12, implicit-def dead early-clobber $r29, 12, implicit-def dead early-clobber $r30, 12, implicit-def dead early-clobber $r31 + BDNZ8 %bb.4, implicit-def dead $ctr8, implicit $ctr8 + B %bb.3 + + ; CHECK: savePoint: '' + ; CHECK-NEXT: restorePoint: '' + + ; CHECK: bb.4.for.body: + ; CHECK-NEXT: successors: %bb.4(0x7c000000), %bb.3(0x04000000) + ; CHECK-NEXT: liveins: $r4, $x3 + ; CHECK: INLINEASM + ; CHECK-NEXT: BDNZ8 %bb.4 + ; CHECK-NEXT: B %bb.3 +... -- 2.7.4