From 2a7a47fc6c19703a849a34243701a09052cb1bc6 Mon Sep 17 00:00:00 2001 From: Alexander Graf Date: Wed, 20 Jun 2012 21:27:02 +0200 Subject: [PATCH] PPC: BookE: Implement EPR SPR On the e500 series, accessing SPR_EPR magically turns into an access at that CPU's IACK register on the MPIC. Implement that logic to get kernels that make use of that feature work. Signed-off-by: Alexander Graf --- hw/ppce500_mpc8544ds.c | 1 + target-ppc/Makefile.objs | 1 + target-ppc/cpu.h | 1 + target-ppc/helper.h | 1 + target-ppc/mpic_helper.c | 35 +++++++++++++++++++++++++++++++++++ 5 files changed, 39 insertions(+) create mode 100644 target-ppc/mpic_helper.c diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c index d38ad99..8b9fd83 100644 --- a/hw/ppce500_mpc8544ds.c +++ b/hw/ppce500_mpc8544ds.c @@ -469,6 +469,7 @@ static void mpc8544ds_init(ram_addr_t ram_size, irqs[i][OPENPIC_OUTPUT_INT] = input[PPCE500_INPUT_INT]; irqs[i][OPENPIC_OUTPUT_CINT] = input[PPCE500_INPUT_CINT]; env->spr[SPR_BOOKE_PIR] = env->cpu_index = i; + env->mpic_cpu_base = MPC8544_MPIC_REGS_BASE + 0x20000; ppc_booke_timers_init(env, 400000000, PPC_TIMER_E500); diff --git a/target-ppc/Makefile.objs b/target-ppc/Makefile.objs index 6c11ef8..237a0ed 100644 --- a/target-ppc/Makefile.objs +++ b/target-ppc/Makefile.objs @@ -9,3 +9,4 @@ obj-y += mmu_helper.o obj-y += timebase_helper.o obj-y += misc_helper.o obj-y += mem_helper.o +obj-y += mpic_helper.o diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 7a77fff..652a35a 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -1066,6 +1066,7 @@ struct CPUPPCState { target_ulong ivor_mask; target_ulong ivpr_mask; target_ulong hreset_vector; + target_phys_addr_t mpic_cpu_base; #endif /* Those resources are used only during code translation */ diff --git a/target-ppc/helper.h b/target-ppc/helper.h index ddab97b..fd04c06 100644 --- a/target-ppc/helper.h +++ b/target-ppc/helper.h @@ -405,6 +405,7 @@ DEF_HELPER_2(store_40x_dbcr0, void, env, tl) DEF_HELPER_2(store_40x_sler, void, env, tl) DEF_HELPER_2(store_booke_tcr, void, env, tl) DEF_HELPER_2(store_booke_tsr, void, env, tl) +DEF_HELPER_1(load_epr, tl, env) DEF_HELPER_3(store_ibatl, void, env, i32, tl) DEF_HELPER_3(store_ibatu, void, env, i32, tl) DEF_HELPER_3(store_dbatl, void, env, i32, tl) diff --git a/target-ppc/mpic_helper.c b/target-ppc/mpic_helper.c new file mode 100644 index 0000000..2c6a4d3 --- /dev/null +++ b/target-ppc/mpic_helper.c @@ -0,0 +1,35 @@ +/* + * PowerPC emulation helpers for QEMU. + * + * Copyright (c) 2003-2007 Jocelyn Mayer + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ +#include "cpu.h" +#include "helper.h" + +/*****************************************************************************/ +/* SPR accesses */ + +#if !defined(CONFIG_USER_ONLY) +/* + * This is an ugly helper for EPR, which is basically the same as accessing + * the IACK (PIAC) register on the MPIC. Because we model the MPIC as a device + * that can only talk to the CPU through MMIO, let's access it that way! + */ +target_ulong helper_load_epr(CPUPPCState *env) +{ + return ldl_phys(env->mpic_cpu_base + 0xA0); +} +#endif -- 2.7.4