From 2a5549f1cc8a6ac58a7b19613e788ec5c41ac89c Mon Sep 17 00:00:00 2001 From: Andrew Pinski Date: Mon, 15 Aug 2022 22:48:25 +0000 Subject: [PATCH] [RISCV] Add constraints for not_single_bit_mask_operand/single_bit_mask_operand Like a previous patch, just add constraints for predicates not_single_bit_mask_operand and single_bit_mask_operand. OK? Built and tested for riscv32-linux-gnu and riscv64-linux-gnu. Thanks, Andrew Pinski gcc/ChangeLog: * config/riscv/constraints.md (DbS): New constraint. (DnS): New constraint. * config/riscv/bitmanip.md (*bset_1_mask): Use new constraint. (*bclr): Likewise. (*binvi): Likewise. --- gcc/config/riscv/bitmanip.md | 6 +++--- gcc/config/riscv/constraints.md | 10 ++++++++++ 2 files changed, 13 insertions(+), 3 deletions(-) diff --git a/gcc/config/riscv/bitmanip.md b/gcc/config/riscv/bitmanip.md index 73b2c10..2c0c8bb 100644 --- a/gcc/config/riscv/bitmanip.md +++ b/gcc/config/riscv/bitmanip.md @@ -324,7 +324,7 @@ (define_insn "*bseti" [(set (match_operand:X 0 "register_operand" "=r") (ior:X (match_operand:X 1 "register_operand" "r") - (match_operand 2 "single_bit_mask_operand" "i")))] + (match_operand:X 2 "single_bit_mask_operand" "DbS")))] "TARGET_ZBS" "bseti\t%0,%1,%S2" [(set_attr "type" "bitmanip")]) @@ -341,7 +341,7 @@ (define_insn "*bclri" [(set (match_operand:X 0 "register_operand" "=r") (and:X (match_operand:X 1 "register_operand" "r") - (match_operand 2 "not_single_bit_mask_operand" "i")))] + (match_operand:X 2 "not_single_bit_mask_operand" "DnS")))] "TARGET_ZBS" "bclri\t%0,%1,%T2" [(set_attr "type" "bitmanip")]) @@ -358,7 +358,7 @@ (define_insn "*binvi" [(set (match_operand:X 0 "register_operand" "=r") (xor:X (match_operand:X 1 "register_operand" "r") - (match_operand 2 "single_bit_mask_operand" "i")))] + (match_operand:X 2 "single_bit_mask_operand" "DbS")))] "TARGET_ZBS" "binvi\t%0,%1,%S2" [(set_attr "type" "bitmanip")]) diff --git a/gcc/config/riscv/constraints.md b/gcc/config/riscv/constraints.md index 444870a..2873d53 100644 --- a/gcc/config/riscv/constraints.md +++ b/gcc/config/riscv/constraints.md @@ -72,6 +72,16 @@ (and (match_code "const_int") (match_test "ival == 63"))) +(define_constraint "DbS" + "@internal" + (and (match_code "const_int") + (match_test "SINGLE_BIT_MASK_OPERAND (ival)"))) + +(define_constraint "DnS" + "@internal" + (and (match_code "const_int") + (match_test "SINGLE_BIT_MASK_OPERAND (~ival)"))) + ;; Floating-point constant +0.0, used for FCVT-based moves when FMV is ;; not available in RV32. (define_constraint "G" -- 2.7.4