From 29de6ce574870a0d3fd157afdbf51c0282e2bf63 Mon Sep 17 00:00:00 2001 From: Damien Lespiau Date: Fri, 19 Oct 2012 17:55:43 +0100 Subject: [PATCH] drm/i915: Don't program DSPCLK_GATE_D twice on IVB and VLV We were programming register 0x42020 twice on those platforms. Once should be enough. Signed-off-by: Damien Lespiau Reviewed-by: Paulo Zanoni Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_pm.c | 6 ------ 1 file changed, 6 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index a0804eb..30ae8f5 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -3498,11 +3498,8 @@ static void ivybridge_init_clock_gating(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; int pipe; - uint32_t dspclk_gate = ILK_VRHUNIT_CLOCK_GATE_DISABLE; uint32_t snpcr; - I915_WRITE(ILK_DSPCLK_GATE_D, dspclk_gate); - I915_WRITE(WM3_LP_ILK, 0); I915_WRITE(WM2_LP_ILK, 0); I915_WRITE(WM1_LP_ILK, 0); @@ -3580,9 +3577,6 @@ static void valleyview_init_clock_gating(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; int pipe; - uint32_t dspclk_gate = ILK_VRHUNIT_CLOCK_GATE_DISABLE; - - I915_WRITE(ILK_DSPCLK_GATE_D, dspclk_gate); I915_WRITE(WM3_LP_ILK, 0); I915_WRITE(WM2_LP_ILK, 0); -- 2.7.4