From 298f464762bb4b6c07c5e6ce5a94654bafee23c0 Mon Sep 17 00:00:00 2001 From: Andreas Krebbel Date: Fri, 24 Mar 2017 13:55:41 +0000 Subject: [PATCH] S/390: movsf/sd pattern fixes. The SD/SFmode move pattern used a wrong mnemonic for vector load element. On the vector load element instruction was an operand missing. Regression tested on s390x. 2017-03-24 Andreas Krebbel * config/s390/s390.md ("mov" SD_SF): Change vleg/vsteg to vlef/vstef. Add missing operand to vleif. From-SVN: r246447 --- gcc/ChangeLog | 5 +++++ gcc/config/s390/s390.md | 6 +++--- 2 files changed, 8 insertions(+), 3 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 7098da9..0b76aa4 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,10 @@ 2017-03-24 Andreas Krebbel + * config/s390/s390.md ("mov" SD_SF): Change vleg/vsteg to + vlef/vstef. Add missing operand to vleif. + +2017-03-24 Andreas Krebbel + * config/s390/s390.c (s390_expand_vec_init): Enable vector load pair for all vector types with 64 bit elements. * config/s390/vx-builtins.md (V_HW_64): Move mode iterator to ... diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md index 555a779..75b15df 100644 --- a/gcc/config/s390/s390.md +++ b/gcc/config/s390/s390.md @@ -2613,11 +2613,11 @@ st\t%1,%0 sty\t%1,%0 vlr\t%v0,%v1 - vleif\t%v0,0 + vleif\t%v0,0,0 vlvgf\t%v0,%1,0 vlgvf\t%0,%v1,0 - vleg\t%0,%1,0 - vsteg\t%1,%0,0" + vlef\t%0,%1,0 + vstef\t%1,%0,0" [(set_attr "op_type" "RRE,RR,RR,RXE,RX,RXY,RX,RXY,RI,RR,RIL,RX,RXY,RIL,RX,RXY,VRR,VRI,VRS,VRS,VRX,VRX") (set_attr "type" "fsimpsf,fsimpsf,fload,fload,fload,fload, fstore,fstore,*,lr,load,load,load,store,store,store,*,*,*,*,load,store") -- 2.7.4