From 28851b62cc64c9c48fcb22c182a66a9489900bd7 Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Mon, 1 Feb 2016 01:33:42 +0000 Subject: [PATCH] [TableGen] Store result of getInstructionsByEnumValue in an ArrayRef instead of accidentally copying to a vector. llvm-svn: 259336 --- llvm/utils/TableGen/CodeEmitterGen.cpp | 8 ++------ llvm/utils/TableGen/CodeGenDAGPatterns.cpp | 2 +- llvm/utils/TableGen/CodeGenMapTable.cpp | 2 +- llvm/utils/TableGen/DisassemblerEmitter.cpp | 2 +- llvm/utils/TableGen/InstrInfoEmitter.cpp | 12 ++++++------ 5 files changed, 11 insertions(+), 15 deletions(-) diff --git a/llvm/utils/TableGen/CodeEmitterGen.cpp b/llvm/utils/TableGen/CodeEmitterGen.cpp index 46fcdf5..c74f80e 100644 --- a/llvm/utils/TableGen/CodeEmitterGen.cpp +++ b/llvm/utils/TableGen/CodeEmitterGen.cpp @@ -227,7 +227,7 @@ void CodeEmitterGen::run(raw_ostream &o) { // For little-endian instruction bit encodings, reverse the bit order Target.reverseBitsForLittleEndianEncoding(); - const std::vector &NumberedInstructions = + ArrayRef NumberedInstructions = Target.getInstructionsByEnumValue(); // Emit function declaration @@ -238,11 +238,7 @@ void CodeEmitterGen::run(raw_ostream &o) { // Emit instruction base values o << " static const uint64_t InstBits[] = {\n"; - for (std::vector::const_iterator - IN = NumberedInstructions.begin(), - EN = NumberedInstructions.end(); - IN != EN; ++IN) { - const CodeGenInstruction *CGI = *IN; + for (const CodeGenInstruction *CGI : NumberedInstructions) { Record *R = CGI->TheDef; if (R->getValueAsString("Namespace") == "TargetOpcode" || diff --git a/llvm/utils/TableGen/CodeGenDAGPatterns.cpp b/llvm/utils/TableGen/CodeGenDAGPatterns.cpp index 3ebe51e0..0de3b61 100644 --- a/llvm/utils/TableGen/CodeGenDAGPatterns.cpp +++ b/llvm/utils/TableGen/CodeGenDAGPatterns.cpp @@ -3249,7 +3249,7 @@ void CodeGenDAGPatterns::AddPatternToMatch(TreePattern *Pattern, void CodeGenDAGPatterns::InferInstructionFlags() { - const std::vector &Instructions = + ArrayRef Instructions = Target.getInstructionsByEnumValue(); // First try to infer flags from the primary instruction pattern, if any. diff --git a/llvm/utils/TableGen/CodeGenMapTable.cpp b/llvm/utils/TableGen/CodeGenMapTable.cpp index f66dd08..76d0ae2 100644 --- a/llvm/utils/TableGen/CodeGenMapTable.cpp +++ b/llvm/utils/TableGen/CodeGenMapTable.cpp @@ -355,7 +355,7 @@ Record *MapTableEmitter::getInstrForColumn(Record *KeyInstr, unsigned MapTableEmitter::emitBinSearchTable(raw_ostream &OS) { - const std::vector &NumberedInstructions = + ArrayRef NumberedInstructions = Target.getInstructionsByEnumValue(); std::string TargetName = Target.getName(); const std::vector &ValueCols = InstrMapDesc.getValueCols(); diff --git a/llvm/utils/TableGen/DisassemblerEmitter.cpp b/llvm/utils/TableGen/DisassemblerEmitter.cpp index e859527..b6a2b1c 100644 --- a/llvm/utils/TableGen/DisassemblerEmitter.cpp +++ b/llvm/utils/TableGen/DisassemblerEmitter.cpp @@ -111,7 +111,7 @@ void EmitDisassembler(RecordKeeper &Records, raw_ostream &OS) { if (Target.getName() == "X86") { DisassemblerTables Tables; - const std::vector &numberedInstructions = + ArrayRef numberedInstructions = Target.getInstructionsByEnumValue(); for (unsigned i = 0, e = numberedInstructions.size(); i != e; ++i) diff --git a/llvm/utils/TableGen/InstrInfoEmitter.cpp b/llvm/utils/TableGen/InstrInfoEmitter.cpp index 388c427..4978a5a 100644 --- a/llvm/utils/TableGen/InstrInfoEmitter.cpp +++ b/llvm/utils/TableGen/InstrInfoEmitter.cpp @@ -59,12 +59,12 @@ private: raw_ostream &OS); void emitOperandTypesEnum(raw_ostream &OS, const CodeGenTarget &Target); void initOperandMapData( - const std::vector &NumberedInstructions, + ArrayRef NumberedInstructions, const std::string &Namespace, std::map &Operands, OpNameMapTy &OperandMap); void emitOperandNameMappings(raw_ostream &OS, const CodeGenTarget &Target, - const std::vector &NumberedInstructions); + ArrayRef NumberedInstructions); // Operand information. void EmitOperandInfo(raw_ostream &OS, OperandInfoMapTy &OperandInfoIDs); @@ -198,7 +198,7 @@ void InstrInfoEmitter::EmitOperandInfo(raw_ostream &OS, /// each instructions. This is used to generate the OperandMap table as /// well as the getNamedOperandIdx() function. void InstrInfoEmitter::initOperandMapData( - const std::vector &NumberedInstructions, + ArrayRef NumberedInstructions, const std::string &Namespace, std::map &Operands, OpNameMapTy &OperandMap) { @@ -234,7 +234,7 @@ void InstrInfoEmitter::initOperandMapData( /// OpName enum void InstrInfoEmitter::emitOperandNameMappings(raw_ostream &OS, const CodeGenTarget &Target, - const std::vector &NumberedInstructions) { + ArrayRef NumberedInstructions) { const std::string &Namespace = Target.getInstNamespace(); std::string OpNameNS = "OpName"; @@ -380,7 +380,7 @@ void InstrInfoEmitter::run(raw_ostream &OS) { // Emit all of the MCInstrDesc records in their ENUM ordering. // OS << "\nextern const MCInstrDesc " << TargetName << "Insts[] = {\n"; - const std::vector &NumberedInstructions = + ArrayRef NumberedInstructions = Target.getInstructionsByEnumValue(); SequenceToOffsetTable InstrNames; @@ -577,7 +577,7 @@ void InstrInfoEmitter::emitEnums(raw_ostream &OS) { if (Namespace.empty()) PrintFatalError("No instructions defined!"); - const std::vector &NumberedInstructions = + ArrayRef NumberedInstructions = Target.getInstructionsByEnumValue(); OS << "namespace " << Namespace << " {\n"; -- 2.7.4