From 27e7db54eb2fdb1e29c83b4b0acf90d558eba141 Mon Sep 17 00:00:00 2001 From: Florian Hahn Date: Tue, 6 Sep 2022 18:20:16 +0100 Subject: [PATCH] Revert "[SCCP] convert signed div/rem to unsigned for non-negative operands" This reverts commit fe1f3cfc2669aca387a45c8ce615b45c1db50fc6. It looks like this commit breaks building llvm-test-suite. To reproduce, run `opt -passes=ipsccp` on the IR below. @g = internal global i32 256, align 4 define void @test() { entry: %0 = load i32, ptr @g, align 4 %div = sdiv i32 %0, undef ret void } --- llvm/lib/Transforms/Scalar/SCCP.cpp | 12 -------- llvm/test/Transforms/PhaseOrdering/srem.ll | 9 ++---- .../SCCP/binaryops-range-special-cases.ll | 2 +- llvm/test/Transforms/SCCP/divrem.ll | 32 +++++----------------- 4 files changed, 11 insertions(+), 44 deletions(-) diff --git a/llvm/lib/Transforms/Scalar/SCCP.cpp b/llvm/lib/Transforms/Scalar/SCCP.cpp index 4de60e0..cccf1ab 100644 --- a/llvm/lib/Transforms/Scalar/SCCP.cpp +++ b/llvm/lib/Transforms/Scalar/SCCP.cpp @@ -175,18 +175,6 @@ static bool replaceSignedInst(SCCPSolver &Solver, NewInst = new ZExtInst(Op0, Inst.getType(), "", &Inst); break; } - case Instruction::SDiv: - case Instruction::SRem: { - // If both operands are not negative, this is the same as udiv/urem. - Value *Op0 = Inst.getOperand(0), *Op1 = Inst.getOperand(1); - if (InsertedValues.count(Op0) || InsertedValues.count(Op1) || - !isNonNegative(Op0) || !isNonNegative(Op1)) - return false; - auto NewOpcode = Inst.getOpcode() == Instruction::SDiv ? Instruction::UDiv - : Instruction::URem; - NewInst = BinaryOperator::Create(NewOpcode, Op0, Op1, "", &Inst); - break; - } default: return false; } diff --git a/llvm/test/Transforms/PhaseOrdering/srem.ll b/llvm/test/Transforms/PhaseOrdering/srem.ll index 26a7191..fd935c6 100644 --- a/llvm/test/Transforms/PhaseOrdering/srem.ll +++ b/llvm/test/Transforms/PhaseOrdering/srem.ll @@ -3,16 +3,13 @@ ; RUN: opt -O2 -S < %s | FileCheck %s ; RUN: opt -O3 -S < %s | FileCheck %s -; srem should be folded based on branch conditions -; This can be done by IPSCCP or CVP. - define i32 @PR57472(i32 noundef %x) { ; CHECK-LABEL: @PR57472( ; CHECK-NEXT: entry: ; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[X:%.*]], -1 -; CHECK-NEXT: [[REM:%.*]] = and i32 [[X]], 15 -; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[CMP]], i32 [[REM]], i32 42 -; CHECK-NEXT: ret i32 [[SPEC_SELECT]] +; CHECK-NEXT: [[REM:%.*]] = srem i32 [[X]], 16 +; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[REM]], i32 42 +; CHECK-NEXT: ret i32 [[COND]] ; entry: %x.addr = alloca i32, align 4 diff --git a/llvm/test/Transforms/SCCP/binaryops-range-special-cases.ll b/llvm/test/Transforms/SCCP/binaryops-range-special-cases.ll index b0e9742..9859745 100644 --- a/llvm/test/Transforms/SCCP/binaryops-range-special-cases.ll +++ b/llvm/test/Transforms/SCCP/binaryops-range-special-cases.ll @@ -130,7 +130,7 @@ define void @srem_cmp_constants() { ; CHECK-NEXT: call void @use(i1 false) ; CHECK-NEXT: call void @use(i1 true) ; CHECK-NEXT: call void @use(i1 false) -; CHECK-NEXT: [[SREM_3:%.*]] = urem i16 12704, 0 +; CHECK-NEXT: [[SREM_3:%.*]] = srem i16 12704, 0 ; CHECK-NEXT: [[C_5:%.*]] = icmp eq i16 [[SREM_3]], 1 ; CHECK-NEXT: call void @use(i1 [[C_5]]) ; CHECK-NEXT: ret void diff --git a/llvm/test/Transforms/SCCP/divrem.ll b/llvm/test/Transforms/SCCP/divrem.ll index b3b4775..6b85238 100644 --- a/llvm/test/Transforms/SCCP/divrem.ll +++ b/llvm/test/Transforms/SCCP/divrem.ll @@ -5,7 +5,7 @@ define i8 @sdiv_nonneg0_nonneg1(i8 %x, i8 %y) { ; CHECK-LABEL: @sdiv_nonneg0_nonneg1( ; CHECK-NEXT: [[PX:%.*]] = and i8 [[X:%.*]], 127 ; CHECK-NEXT: [[PY:%.*]] = lshr i8 [[Y:%.*]], 1 -; CHECK-NEXT: [[R:%.*]] = udiv i8 [[PX]], [[PY]] +; CHECK-NEXT: [[R:%.*]] = sdiv i8 [[PX]], [[PY]] ; CHECK-NEXT: ret i8 [[R]] ; %px = and i8 %x, 127 @@ -17,7 +17,7 @@ define i8 @sdiv_nonneg0_nonneg1(i8 %x, i8 %y) { define i8 @sdiv_nonnegconst0_nonneg1(i7 %y) { ; CHECK-LABEL: @sdiv_nonnegconst0_nonneg1( ; CHECK-NEXT: [[PY:%.*]] = zext i7 [[Y:%.*]] to i8 -; CHECK-NEXT: [[R:%.*]] = udiv i8 42, [[PY]] +; CHECK-NEXT: [[R:%.*]] = sdiv i8 42, [[PY]] ; CHECK-NEXT: ret i8 [[R]] ; %py = zext i7 %y to i8 @@ -25,8 +25,6 @@ define i8 @sdiv_nonnegconst0_nonneg1(i7 %y) { ret i8 %r } -; TODO: This can be converted to udiv. - define i8 @sdiv_nonneg0_nonnegconst1(i8 %x) { ; CHECK-LABEL: @sdiv_nonneg0_nonnegconst1( ; CHECK-NEXT: [[PX:%.*]] = mul nsw i8 [[X:%.*]], [[X]] @@ -38,8 +36,6 @@ define i8 @sdiv_nonneg0_nonnegconst1(i8 %x) { ret i8 %r } -; negative test - define i8 @sdiv_unknown0_nonneg1(i8 %x, i8 %y) { ; CHECK-LABEL: @sdiv_unknown0_nonneg1( ; CHECK-NEXT: [[PY:%.*]] = lshr i8 [[Y:%.*]], 1 @@ -51,8 +47,6 @@ define i8 @sdiv_unknown0_nonneg1(i8 %x, i8 %y) { ret i8 %r } -; negative test - define i8 @sdiv_nonnegconst0_unknown1(i7 %y) { ; CHECK-LABEL: @sdiv_nonnegconst0_unknown1( ; CHECK-NEXT: [[SY:%.*]] = sext i7 [[Y:%.*]] to i8 @@ -64,8 +58,6 @@ define i8 @sdiv_nonnegconst0_unknown1(i7 %y) { ret i8 %r } -; negative test - mul must be 'nsw' to be known non-negative - define i8 @sdiv_unknown0_nonnegconst1(i8 %x) { ; CHECK-LABEL: @sdiv_unknown0_nonnegconst1( ; CHECK-NEXT: [[SX:%.*]] = mul i8 [[X:%.*]], [[X]] @@ -81,7 +73,7 @@ define i8 @srem_nonneg0_nonneg1(i8 %x, i8 %y) { ; CHECK-LABEL: @srem_nonneg0_nonneg1( ; CHECK-NEXT: [[PX:%.*]] = and i8 [[X:%.*]], 127 ; CHECK-NEXT: [[PY:%.*]] = lshr i8 [[Y:%.*]], 1 -; CHECK-NEXT: [[R:%.*]] = urem i8 [[PX]], [[PY]] +; CHECK-NEXT: [[R:%.*]] = srem i8 [[PX]], [[PY]] ; CHECK-NEXT: ret i8 [[R]] ; %px = and i8 %x, 127 @@ -93,7 +85,7 @@ define i8 @srem_nonneg0_nonneg1(i8 %x, i8 %y) { define i8 @srem_nonnegconst0_nonneg1(i8 %y) { ; CHECK-LABEL: @srem_nonnegconst0_nonneg1( ; CHECK-NEXT: [[PY:%.*]] = and i8 [[Y:%.*]], 127 -; CHECK-NEXT: [[R:%.*]] = urem i8 42, [[PY]] +; CHECK-NEXT: [[R:%.*]] = srem i8 42, [[PY]] ; CHECK-NEXT: ret i8 [[R]] ; %py = and i8 %y, 127 @@ -104,7 +96,7 @@ define i8 @srem_nonnegconst0_nonneg1(i8 %y) { define i8 @srem_nonneg0_nonnegconst1(i7 %x) { ; CHECK-LABEL: @srem_nonneg0_nonnegconst1( ; CHECK-NEXT: [[PX:%.*]] = zext i7 [[X:%.*]] to i8 -; CHECK-NEXT: [[R:%.*]] = urem i8 [[PX]], 42 +; CHECK-NEXT: [[R:%.*]] = srem i8 [[PX]], 42 ; CHECK-NEXT: ret i8 [[R]] ; %px = zext i7 %x to i8 @@ -112,8 +104,6 @@ define i8 @srem_nonneg0_nonnegconst1(i7 %x) { ret i8 %r } -; negative test - define i8 @srem_unknown0_nonneg1(i8 %x, i8 %y) { ; CHECK-LABEL: @srem_unknown0_nonneg1( ; CHECK-NEXT: [[PY:%.*]] = lshr i8 [[Y:%.*]], 1 @@ -125,8 +115,6 @@ define i8 @srem_unknown0_nonneg1(i8 %x, i8 %y) { ret i8 %r } -; negative test - define i8 @srem_nonnegconst0_unknown1(i7 %y) { ; CHECK-LABEL: @srem_nonnegconst0_unknown1( ; CHECK-NEXT: [[SY:%.*]] = sext i7 [[Y:%.*]] to i8 @@ -138,8 +126,6 @@ define i8 @srem_nonnegconst0_unknown1(i7 %y) { ret i8 %r } -; negative test - mul must be 'nsw' to be known non-negative - define i8 @srem_unknown0_nonnegconst1(i8 %x) { ; CHECK-LABEL: @srem_unknown0_nonnegconst1( ; CHECK-NEXT: [[SX:%.*]] = mul i8 [[X:%.*]], [[X]] @@ -151,15 +137,13 @@ define i8 @srem_unknown0_nonnegconst1(i8 %x) { ret i8 %r } -; x is known non-negative in t block - define i32 @PR57472(i32 %x) { ; CHECK-LABEL: @PR57472( ; CHECK-NEXT: entry: ; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[X:%.*]], 0 ; CHECK-NEXT: br i1 [[CMP]], label [[T:%.*]], label [[F:%.*]] ; CHECK: t: -; CHECK-NEXT: [[REM:%.*]] = urem i32 [[X]], 16 +; CHECK-NEXT: [[REM:%.*]] = srem i32 [[X]], 16 ; CHECK-NEXT: br label [[EXIT:%.*]] ; CHECK: f: ; CHECK-NEXT: br label [[EXIT]] @@ -183,8 +167,6 @@ exit: ret i32 %cond } -; x is known non-negative in f block - define i32 @PR57472_alt(i32 %x) { ; CHECK-LABEL: @PR57472_alt( ; CHECK-NEXT: entry: @@ -193,7 +175,7 @@ define i32 @PR57472_alt(i32 %x) { ; CHECK: t: ; CHECK-NEXT: br label [[EXIT:%.*]] ; CHECK: f: -; CHECK-NEXT: [[DIV:%.*]] = udiv i32 16, [[X]] +; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 16, [[X]] ; CHECK-NEXT: br label [[EXIT]] ; CHECK: exit: ; CHECK-NEXT: [[COND:%.*]] = phi i32 [ -42, [[T]] ], [ [[DIV]], [[F]] ] -- 2.7.4