From 27e2f82f17806c8be2b7e2519e7ff9a0355f5770 Mon Sep 17 00:00:00 2001 From: Rhys Perry Date: Thu, 18 Mar 2021 15:02:30 +0000 Subject: [PATCH] aco: implement image_deref_samples It used to be that this intrinsic was never created and texture instructions were always used. Signed-off-by: Rhys Perry Reviewed-by: Samuel Pitoiset Fixes: 50881d59e66 ("compiler/spirv: fix image sample queries") Part-of: --- src/amd/compiler/aco_instruction_selection.cpp | 54 ++++++++++++++-------- .../compiler/aco_instruction_selection_setup.cpp | 1 + 2 files changed, 36 insertions(+), 19 deletions(-) diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp index feb746a..f8d2435 100644 --- a/src/amd/compiler/aco_instruction_selection.cpp +++ b/src/amd/compiler/aco_instruction_selection.cpp @@ -5995,6 +5995,37 @@ void visit_image_size(isel_context *ctx, nir_intrinsic_instr *instr) emit_split_vector(ctx, dst, instr->dest.ssa.num_components); } +void get_image_samples(isel_context *ctx, Definition dst, Temp resource) +{ + Builder bld(ctx->program, ctx->block); + + Temp dword3 = emit_extract_vector(ctx, resource, 3, s1); + Temp samples_log2 = bld.sop2(aco_opcode::s_bfe_u32, bld.def(s1), bld.def(s1, scc), dword3, Operand(16u | 4u<<16)); + Temp samples = bld.sop2(aco_opcode::s_lshl_b32, bld.def(s1), bld.def(s1, scc), Operand(1u), samples_log2); + Temp type = bld.sop2(aco_opcode::s_bfe_u32, bld.def(s1), bld.def(s1, scc), dword3, Operand(28u | 4u<<16 /* offset=28, width=4 */)); + + Operand default_sample = Operand(1u); + if (ctx->options->robust_buffer_access) { + /* Extract the second dword of the descriptor, if it's + * all zero, then it's a null descriptor. + */ + Temp dword1 = emit_extract_vector(ctx, resource, 1, s1); + Temp is_non_null_descriptor = bld.sopc(aco_opcode::s_cmp_gt_u32, bld.def(s1, scc), dword1, Operand(0u)); + default_sample = Operand(is_non_null_descriptor); + } + + Temp is_msaa = bld.sopc(aco_opcode::s_cmp_ge_u32, bld.def(s1, scc), type, Operand(14u)); + bld.sop2(aco_opcode::s_cselect_b32, dst, samples, default_sample, bld.scc(is_msaa)); +} + +void visit_image_samples(isel_context *ctx, nir_intrinsic_instr *instr) +{ + Builder bld(ctx->program, ctx->block); + Temp dst = get_ssa_temp(ctx, &instr->dest.ssa); + Temp resource = get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr), ACO_DESC_IMAGE, NULL, true, false); + get_image_samples(ctx, Definition(dst), resource); +} + void visit_load_ssbo(isel_context *ctx, nir_intrinsic_instr *instr) { Builder bld(ctx->program, ctx->block); @@ -7640,6 +7671,9 @@ void visit_intrinsic(isel_context *ctx, nir_intrinsic_instr *instr) case nir_intrinsic_image_deref_size: visit_image_size(ctx, instr); break; + case nir_intrinsic_image_deref_samples: + visit_image_samples(ctx, instr); + break; case nir_intrinsic_load_ssbo: visit_load_ssbo(ctx, instr); break; @@ -8636,25 +8670,7 @@ void visit_tex(isel_context *ctx, nir_tex_instr *instr) return get_buffer_size(ctx, resource, get_ssa_temp(ctx, &instr->dest.ssa)); if (instr->op == nir_texop_texture_samples) { - Temp dword3 = emit_extract_vector(ctx, resource, 3, s1); - - Temp samples_log2 = bld.sop2(aco_opcode::s_bfe_u32, bld.def(s1), bld.def(s1, scc), dword3, Operand(16u | 4u<<16)); - Temp samples = bld.sop2(aco_opcode::s_lshl_b32, bld.def(s1), bld.def(s1, scc), Operand(1u), samples_log2); - Temp type = bld.sop2(aco_opcode::s_bfe_u32, bld.def(s1), bld.def(s1, scc), dword3, Operand(28u | 4u<<16 /* offset=28, width=4 */)); - - Operand default_sample = Operand(1u); - if (ctx->options->robust_buffer_access) { - /* Extract the second dword of the descriptor, if it's - * all zero, then it's a null descriptor. - */ - Temp dword1 = emit_extract_vector(ctx, resource, 1, s1); - Temp is_non_null_descriptor = bld.sopc(aco_opcode::s_cmp_gt_u32, bld.def(s1, scc), dword1, Operand(0u)); - default_sample = Operand(is_non_null_descriptor); - } - - Temp is_msaa = bld.sopc(aco_opcode::s_cmp_ge_u32, bld.def(s1, scc), type, Operand(14u)); - bld.sop2(aco_opcode::s_cselect_b32, Definition(get_ssa_temp(ctx, &instr->dest.ssa)), - samples, default_sample, bld.scc(is_msaa)); + get_image_samples(ctx, Definition(get_ssa_temp(ctx, &instr->dest.ssa)), resource); return; } diff --git a/src/amd/compiler/aco_instruction_selection_setup.cpp b/src/amd/compiler/aco_instruction_selection_setup.cpp index 4e2c016..bebe6e1 100644 --- a/src/amd/compiler/aco_instruction_selection_setup.cpp +++ b/src/amd/compiler/aco_instruction_selection_setup.cpp @@ -738,6 +738,7 @@ void init_context(isel_context *ctx, nir_shader *shader) case nir_intrinsic_load_ring_tess_offchip_offset_amd: case nir_intrinsic_load_ring_esgs_amd: case nir_intrinsic_load_ring_es2gs_offset_amd: + case nir_intrinsic_image_deref_samples: type = RegType::sgpr; break; case nir_intrinsic_load_sample_id: -- 2.7.4