From 277736eee618be1426034c7dee01b7fbad15d7f7 Mon Sep 17 00:00:00 2001 From: Hal Finkel Date: Fri, 2 Sep 2016 23:41:54 +0000 Subject: [PATCH] [PowerPC] Add support for the extended dcbf form and mnemonics dcbf has an optional hint-like field, add support for the extended form and the associated mnemonics (dcbfl and dcbflp). Partially fixes PR24796. llvm-svn: 280559 --- llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp | 17 +++++++++++++++++ .../lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp | 19 +++++++++++++++++++ llvm/lib/Target/PowerPC/PPCInstrInfo.td | 13 ++++++++++--- .../MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt | 6 ++++++ llvm/test/MC/PowerPC/ppc64-encoding-bookII.s | 14 ++++++++++++-- 5 files changed, 64 insertions(+), 5 deletions(-) diff --git a/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp b/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp index 48b1837..c7a871d 100644 --- a/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp +++ b/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp @@ -874,6 +874,23 @@ void PPCAsmParser::ProcessInstruction(MCInst &Inst, Inst = TmpInst; break; } + case PPC::DCBFx: + case PPC::DCBFL: + case PPC::DCBFLP: { + int L = 0; + if (Opcode == PPC::DCBFL) + L = 1; + else if (Opcode == PPC::DCBFLP) + L = 3; + + MCInst TmpInst; + TmpInst.setOpcode(PPC::DCBF); + TmpInst.addOperand(MCOperand::createImm(L)); + TmpInst.addOperand(Inst.getOperand(0)); + TmpInst.addOperand(Inst.getOperand(1)); + Inst = TmpInst; + break; + } case PPC::LAx: { MCInst TmpInst; TmpInst.setOpcode(PPC::LA); diff --git a/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp b/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp index d9d9b4f..d1c4b59 100644 --- a/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp +++ b/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp @@ -135,6 +135,25 @@ void PPCInstPrinter::printInst(const MCInst *MI, raw_ostream &O, printAnnotation(O, Annot); return; } + + if (MI->getOpcode() == PPC::DCBF) { + unsigned char L = MI->getOperand(0).getImm(); + if (!L || L == 1 || L == 3) { + O << "\tdcbf"; + if (L == 1 || L == 3) + O << "l"; + if (L == 3) + O << "p"; + O << " "; + + printOperand(MI, 1, O); + O << ", "; + printOperand(MI, 2, O); + + printAnnotation(O, Annot); + return; + } + } if (!printAliasInstr(MI, O)) printInstruction(MI, O); diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.td b/llvm/lib/Target/PowerPC/PPCInstrInfo.td index cc4c453..a3e85dd 100644 --- a/llvm/lib/Target/PowerPC/PPCInstrInfo.td +++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.td @@ -1448,9 +1448,6 @@ def RFEBB : XLForm_S<19, 146, (outs), (ins u1imm:$imm), "rfebb $imm", def DCBA : DCB_Form<758, 0, (outs), (ins memrr:$dst), "dcba $dst", IIC_LdStDCBF, [(int_ppc_dcba xoaddr:$dst)]>, PPC970_DGroup_Single; -def DCBF : DCB_Form<86, 0, (outs), (ins memrr:$dst), "dcbf $dst", - IIC_LdStDCBF, [(int_ppc_dcbf xoaddr:$dst)]>, - PPC970_DGroup_Single; def DCBI : DCB_Form<470, 0, (outs), (ins memrr:$dst), "dcbi $dst", IIC_LdStDCBF, [(int_ppc_dcbi xoaddr:$dst)]>, PPC970_DGroup_Single; @@ -1464,6 +1461,10 @@ def DCBZL : DCB_Form<1014, 1, (outs), (ins memrr:$dst), "dcbzl $dst", IIC_LdStDCBF, [(int_ppc_dcbzl xoaddr:$dst)]>, PPC970_DGroup_Single; +def DCBF : DCB_Form_hint<86, (outs), (ins u5imm:$TH, memrr:$dst), + "dcbf $dst, $TH", IIC_LdStDCBF, []>, + PPC970_DGroup_Single; + let hasSideEffects = 0, mayLoad = 1, mayStore = 1 in { def DCBT : DCB_Form_hint<278, (outs), (ins u5imm:$TH, memrr:$dst), "dcbt $dst, $TH", IIC_LdStDCBF, []>, @@ -1480,6 +1481,8 @@ def : Pat<(int_ppc_dcbt xoaddr:$dst), (DCBT 0, xoaddr:$dst)>; def : Pat<(int_ppc_dcbtst xoaddr:$dst), (DCBTST 0, xoaddr:$dst)>; +def : Pat<(int_ppc_dcbf xoaddr:$dst), + (DCBF 0, xoaddr:$dst)>; def : Pat<(prefetch xoaddr:$dst, (i32 0), imm, (i32 1)), (DCBT 0, xoaddr:$dst)>; // data prefetch for loads @@ -3820,6 +3823,10 @@ def DCBTSTCT : PPCAsmPseudo<"dcbtstct $dst, $TH", (ins memrr:$dst, u5imm:$TH)>; def DCBTSTDS : PPCAsmPseudo<"dcbtstds $dst, $TH", (ins memrr:$dst, u5imm:$TH)>; def DCBTSTT : PPCAsmPseudo<"dcbtstt $dst", (ins memrr:$dst)>; +def DCBFx : PPCAsmPseudo<"dcbf $dst", (ins memrr:$dst)>; +def DCBFL : PPCAsmPseudo<"dcbfl $dst", (ins memrr:$dst)>; +def DCBFLP : PPCAsmPseudo<"dcbflp $dst", (ins memrr:$dst)>; + def : InstAlias<"crset $bx", (CREQV crbitrc:$bx, crbitrc:$bx, crbitrc:$bx)>; def : InstAlias<"crclr $bx", (CRXOR crbitrc:$bx, crbitrc:$bx, crbitrc:$bx)>; def : InstAlias<"crmove $bx, $by", (CROR crbitrc:$bx, crbitrc:$by, crbitrc:$by)>; diff --git a/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt b/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt index 4f62c78..b486383 100644 --- a/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt +++ b/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt @@ -54,6 +54,12 @@ # CHECK: dcbf 2, 3 0x7c 0x02 0x18 0xac +# CHECK: dcbfl 2, 3 +0x7c 0x22 0x18 0xac + +# CHECK: dcbflp 2, 3 +0x7c 0x62 0x18 0xac + # CHECK: lbarx 2, 3, 4 0x7c 0x43 0x20 0x68 diff --git a/llvm/test/MC/PowerPC/ppc64-encoding-bookII.s b/llvm/test/MC/PowerPC/ppc64-encoding-bookII.s index de8b0d2..a6af0a9 100644 --- a/llvm/test/MC/PowerPC/ppc64-encoding-bookII.s +++ b/llvm/test/MC/PowerPC/ppc64-encoding-bookII.s @@ -60,7 +60,12 @@ # CHECK-BE: dcbst 2, 3 # encoding: [0x7c,0x02,0x18,0x6c] # CHECK-LE: dcbst 2, 3 # encoding: [0x6c,0x18,0x02,0x7c] dcbst 2, 3 -# FIXME: dcbf 2, 3, 1 +# CHECK-BE: dcbfl 2, 3 # encoding: [0x7c,0x22,0x18,0xac] +# CHECK-LE: dcbfl 2, 3 # encoding: [0xac,0x18,0x22,0x7c] + dcbf 2, 3, 1 +# CHECK-BE: dcbflp 2, 3 # encoding: [0x7c,0x62,0x18,0xac] +# CHECK-LE: dcbflp 2, 3 # encoding: [0xac,0x18,0x62,0x7c] + dcbf 2, 3, 3 # Synchronization instructions @@ -106,7 +111,12 @@ # CHECK-BE: dcbf 2, 3 # encoding: [0x7c,0x02,0x18,0xac] # CHECK-LE: dcbf 2, 3 # encoding: [0xac,0x18,0x02,0x7c] dcbf 2, 3 -# FIXME: dcbfl 2, 3 +# CHECK-BE: dcbfl 2, 3 # encoding: [0x7c,0x22,0x18,0xac] +# CHECK-LE: dcbfl 2, 3 # encoding: [0xac,0x18,0x22,0x7c] + dcbfl 2, 3 +# CHECK-BE: dcbflp 2, 3 # encoding: [0x7c,0x62,0x18,0xac] +# CHECK-LE: dcbflp 2, 3 # encoding: [0xac,0x18,0x62,0x7c] + dcbflp 2, 3 # CHECK-BE: lbarx 2, 3, 4 # encoding: [0x7c,0x43,0x20,0x68] # CHECK-LE: lbarx 2, 3, 4 # encoding: [0x68,0x20,0x43,0x7c] -- 2.7.4