From 27065374f172f05110b68fe1f452eed414c837bd Mon Sep 17 00:00:00 2001 From: Jiawei Date: Thu, 20 Oct 2022 17:32:35 +0800 Subject: [PATCH] RISC-V: Add zhinx/zhinxmin testcases. Test zhinx/zhinxmin support, same like with zfh/zfhmin testcases but use gprs and don't use fmv instruction. gcc/testsuite/ChangeLog: * gcc.target/riscv/_Float16-zhinx-1.c: New test. * gcc.target/riscv/_Float16-zhinx-2.c: New test. * gcc.target/riscv/_Float16-zhinx-3.c: New test. * gcc.target/riscv/_Float16-zhinxmin-1.c: New test. * gcc.target/riscv/_Float16-zhinxmin-2.c: New test. * gcc.target/riscv/_Float16-zhinxmin-3.c: New test. --- gcc/testsuite/gcc.target/riscv/_Float16-zhinx-1.c | 10 ++++++++++ gcc/testsuite/gcc.target/riscv/_Float16-zhinx-2.c | 9 +++++++++ gcc/testsuite/gcc.target/riscv/_Float16-zhinx-3.c | 9 +++++++++ gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-1.c | 10 ++++++++++ gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-2.c | 10 ++++++++++ gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-3.c | 10 ++++++++++ 6 files changed, 58 insertions(+) create mode 100644 gcc/testsuite/gcc.target/riscv/_Float16-zhinx-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/_Float16-zhinx-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/_Float16-zhinx-3.c create mode 100644 gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-3.c diff --git a/gcc/testsuite/gcc.target/riscv/_Float16-zhinx-1.c b/gcc/testsuite/gcc.target/riscv/_Float16-zhinx-1.c new file mode 100644 index 0000000..90172b5 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/_Float16-zhinx-1.c @@ -0,0 +1,10 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64i_zhinx -mabi=lp64 -O" } */ + +_Float16 foo1 (_Float16 a, _Float16 b) +{ + return b; +} + +/* { dg-final { scan-assembler-not "fmv.h" } } */ +/* { dg-final { scan-assembler-times "mv" 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/_Float16-zhinx-2.c b/gcc/testsuite/gcc.target/riscv/_Float16-zhinx-2.c new file mode 100644 index 0000000..26f0119 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/_Float16-zhinx-2.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64i_zhinx -mabi=lp64 -O" } */ + +_Float16 foo1 (_Float16 a, _Float16 b) +{ + /* { dg-final { scan-assembler-not "fadd.h fa" } } */ + /* { dg-final { scan-assembler-times "fadd.h a" 1 } } */ + return a + b; +} diff --git a/gcc/testsuite/gcc.target/riscv/_Float16-zhinx-3.c b/gcc/testsuite/gcc.target/riscv/_Float16-zhinx-3.c new file mode 100644 index 0000000..5739135 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/_Float16-zhinx-3.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64i_zhinx -mabi=lp64 -O" } */ + +int foo1 (_Float16 a, _Float16 b) +{ + /* { dg-final { scan-assembler-not "fgt.h fa" } } */ + /* { dg-final { scan-assembler-times "fgt.h a" 1 } } */ + return a > b; +} diff --git a/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-1.c b/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-1.c new file mode 100644 index 0000000..0070ebf --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-1.c @@ -0,0 +1,10 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64i_zhinxmin -mabi=lp64 -O" } */ + +_Float16 foo1 (_Float16 a, _Float16 b) +{ + /* { dg-final { scan-assembler-not "fmv.h" } } */ + /* { dg-final { scan-assembler-not "fmv.s" } } */ + /* { dg-final { scan-assembler-times "mv" 1 } } */ + return b; +} diff --git a/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-2.c b/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-2.c new file mode 100644 index 0000000..17f45a9 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-2.c @@ -0,0 +1,10 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64i_zhinxmin -mabi=lp64 -O" } */ + +_Float16 foo1 (_Float16 a, _Float16 b) +{ + /* { dg-final { scan-assembler-not "fadd.h" } } */ + /* { dg-final { scan-assembler-not "fadd.s fa" } } */ + /* { dg-final { scan-assembler-times "fadd.s a" 1 } } */ + return a + b; +} diff --git a/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-3.c b/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-3.c new file mode 100644 index 0000000..7a43641 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-3.c @@ -0,0 +1,10 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64if_zfhmin -mabi=lp64f -O" } */ + +int foo1 (_Float16 a, _Float16 b) +{ + /* { dg-final { scan-assembler-not "fgt.h" } } */ + /* { dg-final { scan-assembler-not "fgt.s fa" } } */ + /* { dg-final { scan-assembler-times "fgt.s a" 1 } } */ + return a > b; +} -- 2.7.4