From 26a51b270f6d87674b713705ba9533440ca41b6c Mon Sep 17 00:00:00 2001 From: Thiemo Seufer Date: Sat, 19 Feb 2005 13:32:02 +0000 Subject: [PATCH] Use intermediate variable. Signed-off-by: Thiemo Seufer Signed-off-by: Ralf Baechle --- arch/mips/mm/c-r4k.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index 4291673..03100b8 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c @@ -380,7 +380,7 @@ static inline void local_r4k_flush_cache_page(void *args) * If ownes no valid ASID yet, cannot possibly have gotten * this page into the cache. */ - if (cpu_context(smp_processor_id(), vma->vm_mm) == 0) + if (cpu_context(smp_processor_id(), mm) == 0) return; page &= PAGE_MASK; @@ -428,8 +428,8 @@ static inline void local_r4k_flush_cache_page(void *args) if (cpu_has_vtag_icache) { int cpu = smp_processor_id(); - if (cpu_context(cpu, vma->vm_mm) != 0) - drop_mmu_context(vma->vm_mm, cpu); + if (cpu_context(cpu, mm) != 0) + drop_mmu_context(mm, cpu); } else r4k_blast_icache_page_indexed(page); } -- 2.7.4