From 2678bb9fa137726a0b83dd61a9c1636543066755 Mon Sep 17 00:00:00 2001 From: Russell King Date: Fri, 12 Jun 2015 09:24:17 +0100 Subject: [PATCH] ARM: fix EFM32 build breakage caused by cpu_resume_arm Fix: arch/arm/kernel/sleep.S:121: Error: selected processor does not support ARM opcodes arch/arm/kernel/sleep.S:123: Error: attempt to use an ARM instruction on a Thumb-only processor -- `adr r9,1f+1' arch/arm/kernel/sleep.S:124: Error: attempt to use an ARM instruction on a Thumb-only processor -- `bx r9' Signed-off-by: Russell King --- arch/arm/kernel/sleep.S | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/kernel/sleep.S b/arch/arm/kernel/sleep.S index 761c5de..6060dbc 100644 --- a/arch/arm/kernel/sleep.S +++ b/arch/arm/kernel/sleep.S @@ -118,12 +118,16 @@ ENDPROC(cpu_resume_after_mmu) .text .align + +#ifdef CONFIG_MMU .arm ENTRY(cpu_resume_arm) THUMB( adr r9, BSYM(1f) ) @ Kernel is entered in ARM. THUMB( bx r9 ) @ If this is a Thumb-2 kernel, THUMB( .thumb ) @ switch to Thumb now. THUMB(1: ) +#endif + ENTRY(cpu_resume) ARM_BE8(setend be) @ ensure we are in BE mode #ifdef CONFIG_ARM_VIRT_EXT @@ -155,7 +159,10 @@ THUMB( ldmia r0!, {r1, r2, r3} ) THUMB( mov sp, r2 ) THUMB( bx r3 ) ENDPROC(cpu_resume) + +#ifdef CONFIG_MMU ENDPROC(cpu_resume_arm) +#endif .align 2 _sleep_save_sp: -- 2.7.4