From 2670912220d8229c6ce3758f29c11401d0bb0646 Mon Sep 17 00:00:00 2001 From: steven Date: Fri, 9 Nov 2012 12:31:32 +0000 Subject: [PATCH] PR middle-end/54385 * postreload.c (reload_cse_simplify): Return a bool indicating whether the CFG was changed. (reload_cse_regs_1): Traverse the CFG instead of the insns chain. Cleanup the CFG if edges may have been removed. (reload_cse_regs): Update. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@193359 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog | 10 +++++++++- gcc/postreload.c | 41 ++++++++++++++++++++++++++--------------- 2 files changed, 35 insertions(+), 16 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 37566fc..01aa551 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,7 +1,15 @@ +2012-11-09 Steven Bosscher + + PR middle-end/54385 + * postreload.c (reload_cse_simplify): Return a bool indicating + whether the CFG was changed. + (reload_cse_regs_1): Traverse the CFG instead of the insns chain. + Cleanup the CFG if edges may have been removed. + (reload_cse_regs): Update. + 2012-11-09 Andrey Belevantsev PR rtl-optimization/54472 - * sel-sched-ir.c (has_dependence_note_reg_set): Handle implicit sets. (has_dependence_note_reg_clobber, has_dependence_note_reg_use): Likewise. diff --git a/gcc/postreload.c b/gcc/postreload.c index d268218..cafcf0f 100644 --- a/gcc/postreload.c +++ b/gcc/postreload.c @@ -48,8 +48,8 @@ along with GCC; see the file COPYING3. If not see #include "dbgcnt.h" static int reload_cse_noop_set_p (rtx); -static void reload_cse_simplify (rtx, rtx); -static void reload_cse_regs_1 (rtx); +static bool reload_cse_simplify (rtx, rtx); +static void reload_cse_regs_1 (void); static int reload_cse_simplify_set (rtx, rtx); static int reload_cse_simplify_operands (rtx, rtx); @@ -67,14 +67,14 @@ static void reload_cse_regs (rtx first ATTRIBUTE_UNUSED) { bool moves_converted; - reload_cse_regs_1 (first); + reload_cse_regs_1 (); reload_combine (); moves_converted = reload_cse_move2add (first); if (flag_expensive_optimizations) { if (moves_converted) reload_combine (); - reload_cse_regs_1 (first); + reload_cse_regs_1 (); } } @@ -88,11 +88,13 @@ reload_cse_noop_set_p (rtx set) return rtx_equal_for_cselib_p (SET_DEST (set), SET_SRC (set)); } -/* Try to simplify INSN. */ -static void +/* Try to simplify INSN. Return true if the CFG may have changed. */ +static bool reload_cse_simplify (rtx insn, rtx testreg) { rtx body = PATTERN (insn); + basic_block insn_bb = BLOCK_FOR_INSN (insn); + unsigned insn_bb_succs = EDGE_COUNT (insn_bb->succs); if (GET_CODE (body) == SET) { @@ -113,7 +115,8 @@ reload_cse_simplify (rtx insn, rtx testreg) value = 0; if (check_for_inc_dec (insn)) delete_insn_and_edges (insn); - return; + /* We're done with this insn. */ + goto done; } if (count > 0) @@ -166,7 +169,7 @@ reload_cse_simplify (rtx insn, rtx testreg) if (check_for_inc_dec (insn)) delete_insn_and_edges (insn); /* We're done with this insn. */ - return; + goto done; } /* It's not a no-op, but we can try to simplify it. */ @@ -179,6 +182,9 @@ reload_cse_simplify (rtx insn, rtx testreg) else reload_cse_simplify_operands (insn, testreg); } + +done: + return (EDGE_COUNT (insn_bb->succs) != insn_bb_succs); } /* Do a very simple CSE pass over the hard registers. @@ -199,25 +205,30 @@ reload_cse_simplify (rtx insn, rtx testreg) if possible, much like an optional reload would. */ static void -reload_cse_regs_1 (rtx first) +reload_cse_regs_1 (void) { + bool cfg_changed = false; + basic_block bb; rtx insn; rtx testreg = gen_rtx_REG (VOIDmode, -1); cselib_init (CSELIB_RECORD_MEMORY); init_alias_analysis (); - for (insn = first; insn; insn = NEXT_INSN (insn)) - { - if (INSN_P (insn)) - reload_cse_simplify (insn, testreg); + FOR_EACH_BB (bb) + FOR_BB_INSNS (bb, insn) + { + if (INSN_P (insn)) + cfg_changed |= reload_cse_simplify (insn, testreg); - cselib_process_insn (insn); - } + cselib_process_insn (insn); + } /* Clean up. */ end_alias_analysis (); cselib_finish (); + if (cfg_changed) + cleanup_cfg (0); } /* Try to simplify a single SET instruction. SET is the set pattern. -- 2.7.4